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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34e70d676b8sm5247864a91.8.2025.12.19.05.00.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 19 Dec 2025 05:00:12 -0800 (PST) Message-ID: <9eaf823b-d18e-4067-8843-0c03530485a9@oss.qualcomm.com> Date: Fri, 19 Dec 2025 21:00:03 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] coresight: tpda: add logic to configure TPDA_SYNCR register From: Jie Gan To: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Tingwei Zhang Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tao Zhang References: <20251219-add_sysfs_nodes_to_configure_tpda-v5-0-ca93ddfe9d30@oss.qualcomm.com> <20251219-add_sysfs_nodes_to_configure_tpda-v5-2-ca93ddfe9d30@oss.qualcomm.com> <38dc6948-6233-4b0a-a769-538939abe345@arm.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: d-WuB1nDLRs9cKYwm1F6otU7vAhbv4oS X-Proofpoint-ORIG-GUID: d-WuB1nDLRs9cKYwm1F6otU7vAhbv4oS X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE5MDEwNiBTYWx0ZWRfXyLUsdnlHHozx WEIQDO9eM5vQOlM9NXM/OO3KLBbnuETR9DY4CBSnDxHWv6eeLSxkcrVNOmOBDnLW+qqkGS958tN Bz8kLciPFR/918hec4vRgjmQ6RRCIztn6nYfDmPfPm1hnW+xSAw387PAwcDSYv02ScQveYRGdVw Mqe1sNEohn+vrD3C2Hr6Q1sBUmYzvhQ4e1iDTxN3/BnxH+OjOUG8l6R+KZUSRFufd6aSS8kZBH5 2BuUI97J2LoK6LJqs+wwNFNsvVxyfSx059i+EBySjndRAJ5fHd3XGxCPW795kqkygRf3eT79AHu qZS5lTiru9PK6tIvp502A+QzMIpS+m7s5znoIwzxAdER6bVEnNn6iWrxuvlXCqyOygRPLxe/K0y 5F9rnr2Fl1SIfzFMGqgpJiO+e1Ar5o0dobidGiGu9SlKFDKBuzDucYS0Tn4Ia9U/A7xHRn1RTDV Y/lV5MYVBBwBqZ62QmA== X-Authority-Analysis: v=2.4 cv=WYwBqkhX c=1 sm=1 tr=0 ts=69454c5e cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=8heJ_ZlZk143kZje2o0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-19_04,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 phishscore=0 adultscore=0 suspectscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512190106 On 12/19/2025 8:31 PM, Jie Gan wrote: > > > On 12/19/2025 6:24 PM, Suzuki K Poulose wrote: >> On 19/12/2025 10:04, Jie Gan wrote: >>> From: Tao Zhang >>> >>> The TPDA_SYNC counter tracks the number of bytes transferred from the >>> aggregator. When this count reaches the value programmed in the >>> TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace >>> tools to accurately parse each valid packet. >>> >>> Signed-off-by: Tao Zhang >>> Reviewed-by: James Clark >>> Co-developed-by: Jie Gan >>> Signed-off-by: Jie Gan >>> --- >>>   drivers/hwtracing/coresight/coresight-tpda.c | 7 +++++++ >>>   drivers/hwtracing/coresight/coresight-tpda.h | 5 +++++ >>>   2 files changed, 12 insertions(+) >>> >>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/ >>> hwtracing/coresight/coresight-tpda.c >>> index d25a8bcfb3d4..d378ff8ad77d 100644 >>> --- a/drivers/hwtracing/coresight/coresight-tpda.c >>> +++ b/drivers/hwtracing/coresight/coresight-tpda.c >>> @@ -163,6 +163,13 @@ static void tpda_enable_pre_port(struct >>> tpda_drvdata *drvdata) >>>        */ >>>       if (drvdata->trig_flag_ts) >>>           writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); >>> + >>> +    val = readl_relaxed(drvdata->base + TPDA_SYNCR); >>> +    /* Reset the mode ctrl */ >>> +    val &= ~TPDA_SYNCR_MODE_CTRL; >>> +    /* Program the counter value for TPDA_SYNCR */ >>> +    val |= TPDA_SYNCR_COUNTER_MASK; >> >> Do we plan to change this value via sysfs ? If not whats the point of >> clearing the field. Why not simply set it (as it is all 1s anyways). > > We configure the value only once during enablement and do not intend to > modify it through sysfs. The mode_ctrl is reset to reinitialize the > counter. > For example, if the TPDA device has been enabled and then disabled, the > counter may have already counted some packets. This could result in an > async packet being triggered with an unexpected data size. > Missed for explaining the mode_ctrl bit. Set value 0 to the mode_ctrl means reset the counter and set the mode to 0. We have two modes: mode = 0: COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests mode = 1: the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K data by writing a value 13 to the COUNT[11:7] field. Thanks, Jie >> >>> +    writel_relaxed(val, drvdata->base + TPDA_SYNCR); >>>   } >>>   static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) >>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/ >>> hwtracing/coresight/coresight-tpda.h >>> index 8a075cfbc3cc..97e2729c15c9 100644 >>> --- a/drivers/hwtracing/coresight/coresight-tpda.h >>> +++ b/drivers/hwtracing/coresight/coresight-tpda.h >>> @@ -9,6 +9,7 @@ >>>   #define TPDA_CR            (0x000) >>>   #define TPDA_Pn_CR(n)        (0x004 + (n * 4)) >>>   #define TPDA_FPID_CR        (0x084) >>> +#define TPDA_SYNCR        (0x08C) >>>   /* Cross trigger Global (all ports) flush request bit */ >>>   #define TPDA_CR_FLREQ        BIT(0) >>> @@ -38,6 +39,10 @@ >>>   #define TPDA_Pn_CR_CMBSIZE        GENMASK(7, 6) >>>   /* Aggregator port DSB data set element size bit */ >>>   #define TPDA_Pn_CR_DSBSIZE        BIT(8) >> >> Newline to separate the defintions of different registers, please. > > will fix it. > > Thanks, > Jie > >> >>> +/* TPDA_SYNCR mode control bit */ >>> +#define TPDA_SYNCR_MODE_CTRL        BIT(12) >>> +/* TPDA_SYNCR counter mask */ >>> +#define TPDA_SYNCR_COUNTER_MASK        GENMASK(11, 0) >>>   #define TPDA_MAX_INPORTS    32 >> >> Suzuki >> >> >>> >> >