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Howlett" , Lorenzo Stoakes , Will Deacon , "Aneesh Kumar K.V" , Nick Piggin , Peter Zijlstra , Andrey Ryabinin , Pasha Tatashin , Chris Li , Kairui Song , Uladzislau Rezki , Steven Rostedt , Masami Hiramatsu , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Eduard Zingerman , Kumar Kartikeya Dwivedi , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , SJ Park , "Matthew Wilcox (Oracle)" , Jan Kara , Jason Gunthorpe , Leon Romanovsky , Miaohe Lin , Dennis Zhou , Tejun Heo , Christoph Lameter , Mike Rapoport , Johannes Weiner , ziy@nvidia.com, pfalcato@suse.de, agordeev@linux.ibm.com, ryan.roberts@arm.com Subject: Re: [PATCH v2 0/8] mm: distinguish PTE table storage from PTE values To: "David Hildenbrand (Arm)" , Alexander Gordeev References: <20260903103002.1091859-1-usama.anjum@arm.com> From: Muhammad Usama Anjum Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: PR3P195CA0001.EURP195.PROD.OUTLOOK.COM (2603:10a6:102:b6::6) To VI1PR08MB3421.eurprd08.prod.outlook.com (2603:10a6:803:80::16) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-TrafficTypeDiagnostic: VI1PR08MB3421:EE_|AS8PR08MB6056:EE_|DB1PEPF000509E5:EE_|AS8PR08MB6232:EE_ X-MS-Office365-Filtering-Correlation-Id: 314c31fd-cf09-48b0-f0cc-08df126c5a53 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0;ARA:13230040|376014|1800799024|7416014|23010399003|366016|22082099003|10063799003|18002099003|56012099006|11063799006|3023799007|4143699003|10067099003|6133799003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ZGMEqhFUi2qhN1Lau3ZeSYgSkk85im6sY2Oo3siiB3KWw+svQD6+JA/ceJFkEG7Xy0hpgo8RlV1zeb8jrPhbA0gtWWX/aJaEmdl/WoZ69cuLy/wGJtajbRaEbHEC1jk5Q7H55rFl7/jBDhtiBRZ0laSQGCGwnmokT6E3IFDr+Z4qB/tsEpINP6fVdZAsgUCibeSURBFVJaMDZwr+7BnUiiEKPh9FpG7vFuHEx2iz8mgshmT15GHzlc6evfAvdED8wO+p5oIeEQcrfWLMdBhP6+IJtikJm7xnv3tzfsl+aag9IAOFGNZe+JRz11n6wAI2Vx2Y6PkszSSCsdUiKYeBQEZYMjDg78IUKoQFBI4DcW+BAFabpFUPhRhuzxUeQW0NDBHEwdvudXrH2LRuwJcyvZqkuAJC6OMt/5FObWJt3rlmmCaDv7CR4inUC0vxr3NJ X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Sep 2026 14:27:49.0313 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 314c31fd-cf09-48b0-f0cc-08df126c5a53 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509E5.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB6232 On 11/09/2026 5:55 pm, David Hildenbrand (Arm) wrote: > On 9/3/26 12:29, Muhammad Usama Anjum wrote: >> Hi, >> >> pte_t currently describes both a software PTE value and an element stored >> in a PTE table. Consequently, pte_t * can point either to a software PTE >> value, often a stack copy, or to a PTE-table slot. The compiler cannot >> distinguish these cases. A value pointer can therefore be passed to an >> interface that expects table storage, while table storage can be read by >> direct dereference instead of the architecture accessor. >> >> This series begins a staged conversion at the PTE level. It introduces >> hw_pte_t as the element type for PTE-table storage and converts generic >> MM to use hw_pte_t *. Software PTE values remain pte_t. Interfaces that >> intentionally return a value through pte_t *, such as install_pte, >> remain value interfaces; the relevant parameters are named ptentp to >> make that distinction explicit. >> >> The generic definition aliases hw_pte_t to pte_t unless an architecture >> selects ARCH_HAS_HW_PTE_T, which enables a distinct generic wrapper named >> __hw_pte_t. Some architectures define pgtable_t in headers parsed before >> the generic hw_pte_t typedef is visible. The structure tag allows those >> headers to define pgtable_t as struct __hw_pte_t * without creating an >> include-order dependency. This is required when converting s390, m68k, >> powerpc and sparc. >> >> No architecture selects ARCH_HAS_HW_PTE_T in this series, so the >> representation and behavior of every architecture are preserved. ptep_get() >> keeps its existing READ_ONCE() semantics and converts the stored element >> through __pte_from_hw(). An architecture can later select the option and >> convert its PTE interfaces to make the distinction compiler-enforced. >> Architecture PTE implementations and most architecture code are >> deliberately left for those later opt-in conversions. >> >> Here, hw_pte_t identifies PTE-table storage rather than table lifetime: >> complete PTE tables use hw_pte_t whether or not they are currently >> linked into a page-table hierarchy, while software PTE values use >> pte_t. The distinction between complete but unlinked tables and >> hardware-reachable tables was raised during discussion and remains an >> important point for review. >> >> PMD, PUD, P4D and PGD storage are deliberately out of scope. They can be >> converted in later series after the PTE boundary is agreed, avoiding the >> PMD-specific cases that made an all-level conversion difficult to >> review. >> >> Most mechanical pointer conversions were generated with the Coccinelle >> script included below, then audited and fixed by hand. >> >> This series does not add a second ptep_get_once() accessor and does not >> remove or replace STRICT_MM_TYPECHECKS. >> >> The design discussion is available at [1]; while the original idea came >> from [2]. >> >> I've the patches here [3] for arm64 conversion which I used to find >> usages in generic code which I missed during development. These would be >> sent separately. > > Unless there is more feedback on the overall approach, the next step for this is > to have at least one architecture support posted. > > We should only merge this if at least one architecture (better two? :) arm64 and > s390x? ) would merge the architecture bits. > > That is, we should get an ACK from the arch maintainer son the common code bits > and the arch bits. > Thank you for reviewing the series. I've posted the patches for arm64 just now [1]. Let's wait for arm64 maintainers to ACK the patches. [1] https://lore.kernel.org/all/20260914-pte0_arm-v1-0-bb53b663e396@arm.com -- Thanks, Usama