From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754236AbbCMJm2 (ORCPT ); Fri, 13 Mar 2015 05:42:28 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:55120 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752551AbbCMJmZ (ORCPT ); Fri, 13 Mar 2015 05:42:25 -0400 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Fri, 13 Mar 2015 10:42:07 +0100 From: Stefan Agner To: Shawn Guo Cc: tglx@linutronix.de, jason@lakedaemon.net, mark.rutland@arm.com, marc.zyngier@arm.com, u.kleine-koenig@pengutronix.de, kernel@pengutronix.de, arnd@arndb.de, robh+dt@kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, pebolle@tiscali.nl, linux@arm.linux.org.uk, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 3/3] ARM: dts: vf610: add Miscellaneous System Control Module (MSCM) In-Reply-To: <20150313044759.GQ20455@dragon> References: <1425249689-32354-1-git-send-email-stefan@agner.ch> <1425249689-32354-4-git-send-email-stefan@agner.ch> <20150311004812.GU20455@dragon> <59b0d98827cb4e7497de81e1c0826964@agner.ch> <20150313044759.GQ20455@dragon> Message-ID: <9eef9ff618d869fe37c9f1d6dd88c641@agner.ch> User-Agent: Roundcube Webmail/1.1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015-03-13 05:48, Shawn Guo wrote: > On Thu, Mar 12, 2015 at 10:03:08AM +0100, Stefan Agner wrote: >> On 2015-03-11 01:48, Shawn Guo wrote: >> > On Sun, Mar 01, 2015 at 11:41:29PM +0100, Stefan Agner wrote: >> >> Add the Miscellaneous System Control Module (MSCM) to the base >> >> device tree for Vybrid SoC's. This module contains registers >> >> to get information of the individual and current (accessing) >> >> CPU. In a second block, there is an interrupt router, which >> >> handles the routing of the interrupts between the two CPU cores >> >> on VF6xx variants of the SoC. However, also on single core >> >> variants the interrupt router needs to be configured in order >> >> to receive interrupts on the CPU's interrupt controller. Almost >> >> all peripheral interrupts are routed through the router, hence >> >> the MSCM module is the default interrupt parent for this SoC. >> >> >> >> In a earlier commit the interrupt nodes were moved out of the >> >> peripheral nodes and specified in the CPU specific vf500.dtsi >> >> device tree. This allowed to use the base device tree vfxxx.dtsi >> >> also for a Cortex-M4 specific device tree, which uses different >> >> interrupt nodes due to the NVIC interrupt controller. However, >> >> since the interrupt parent for peripherals is the MSCM module >> >> independently which CPU the device tree is used for, we can move >> >> the interrupt nodes into the base device tree vfxxx.dtsi again. >> >> Depending on which CPU this base device tree will be used with, >> >> the correct parent interrupt controller has to be assigned to >> >> the MSCM-IR node (GIC or NVIC). The driver takes care of the >> >> parent interrupt controller specific needs (interrupt-cells). >> >> >> >> Acked-by: Marc Zyngier >> >> Signed-off-by: Stefan Agner >> > >> > Stefan, >> > >> > I guess this patch has a run-time dependency on the first two in the >> > series, right? Or put it another way, if I apply this single patch on >> > my branch, the dtb and kernel built from the same branch do not work >> > together, right? If so, we will need to either wait for the first two >> > hit mainline or pull Jason's irqchip/vybrid branch into my tree as >> > prerequisite (irqchip/vybrid needs to be stable). >> > >> > Shawn >> >> Yes, that is true. The driver need to be in place in order to >> successfully boot with the new device tree. > > Okay. Pulled Jason's irqchip/vybrid branch in, and applied the patch. > > Stefan, > > There was a conflict on device dspi1 when applying the patch to my > imx/dt branch. Please take a look to see if I solved it correctly. > Hi Shawn, Your updated patch looks good to me. Also quickly boot tested the branch, worked fine. Thx! -- Stefan