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Fri, 11 Oct 2024 18:35:23 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C44112004B; Fri, 11 Oct 2024 18:35:23 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5558720049; Fri, 11 Oct 2024 18:35:20 +0000 (GMT) Received: from [9.39.20.32] (unknown [9.39.20.32]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 11 Oct 2024 18:35:20 +0000 (GMT) Message-ID: <9f0dcdc6-121d-48a7-8abe-b2ce7acd0cdb@linux.ibm.com> Date: Sat, 12 Oct 2024 00:05:19 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/7] powerpc: add support for PREEMPT_LAZY To: Ankur Arora , Sebastian Andrzej Siewior Cc: linux-kernel@vger.kernel.org, peterz@infradead.org, tglx@linutronix.de, paulmck@kernel.org, mingo@kernel.org, juri.lelli@redhat.com, vincent.guittot@linaro.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mgorman@suse.de, vschneid@redhat.com, frederic@kernel.org, efault@gmx.de, Michael Ellerman References: <20241009165411.3426937-1-ankur.a.arora@oracle.com> <20241009165411.3426937-8-ankur.a.arora@oracle.com> <20241010072221.48wfFV7I@linutronix.de> <87jzef7rsx.fsf@oracle.com> From: Shrikanth Hegde Content-Language: en-US In-Reply-To: <87jzef7rsx.fsf@oracle.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: eql3cwKKf8qigizO4nbvnsdAimxjx3eD X-Proofpoint-ORIG-GUID: oinn3S8R2J25HOYGgoshKr42WtHCBgrn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1051,Hydra:6.0.680,FMLib:17.12.62.30 definitions=2024-10-11_15,2024-10-11_01,2024-09-30_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 clxscore=1011 mlxscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 phishscore=0 malwarescore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410110128 On 10/10/24 23:40, Ankur Arora wrote: > > Sebastian Andrzej Siewior writes: > >> On 2024-10-09 09:54:11 [-0700], Ankur Arora wrote: >>> From: Shrikanth Hegde >>> >>> Add PowerPC arch support for PREEMPT_LAZY by defining LAZY bits. >>> >>> Since PowerPC doesn't use generic exit to functions, check for >>> NEED_RESCHED_LAZY when exiting to user or to the kernel from >>> interrupt routines. >>> >>> Signed-off-by: Shrikanth Hegde >>> [ Changed TIF_NEED_RESCHED_LAZY to now be defined unconditionally. ] >>> Signed-off-by: Ankur Arora >>> --- >>> arch/powerpc/Kconfig | 1 + >>> arch/powerpc/include/asm/thread_info.h | 5 ++++- >>> arch/powerpc/kernel/interrupt.c | 5 +++-- >>> 3 files changed, 8 insertions(+), 3 deletions(-) >>> >>> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig >>> index 8094a01974cc..593a1d60d443 100644 >>> --- a/arch/powerpc/Kconfig >>> +++ b/arch/powerpc/Kconfig >>> @@ -270,6 +270,7 @@ config PPC >>> select HAVE_PERF_REGS >>> select HAVE_PERF_USER_STACK_DUMP >>> select HAVE_RETHOOK if KPROBES >>> + select ARCH_HAS_PREEMPT_LAZY >>> select HAVE_REGS_AND_STACK_ACCESS_API >>> select HAVE_RELIABLE_STACKTRACE >>> select HAVE_RSEQ >> >> I would move this up to the ARCH_HAS_ block. > > Makes sense. > >>> diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h >>> index 6ebca2996f18..ae7793dae763 100644 >>> --- a/arch/powerpc/include/asm/thread_info.h >>> +++ b/arch/powerpc/include/asm/thread_info.h >>> @@ -117,11 +117,14 @@ void arch_setup_new_exec(void); >>> #endif >>> #define TIF_POLLING_NRFLAG 19 /* true if poll_idle() is polling TIF_NEED_RESCHED */ >>> #define TIF_32BIT 20 /* 32 bit binary */ >>> +#define TIF_NEED_RESCHED_LAZY 21 /* Lazy rescheduling */ >> >> I don't see any of the bits being used in assembly anymore. >> If you group the _TIF_USER_WORK_MASK bits it a single 16 bit block then >> the compiler could issue a single andi. > That's a good find. since by default powerpc uses 4 byte fixed ISA, compiler would generate extra code for _TIF_USER_WORK_MASK. Looked at the objdump. It indeed does. I see that value 9 isn't being used. It was last used for TIF_NOHZ which is removed now. That value could be used for RESCHED_LAZY. Using that value i see the code generated is similar to what we have now. +mpe Ankur, Could you please change the value to 9? --------------------------------------------------------------------- I see with value 9, andi is used again. 254: 80 00 dc eb ld r30,128(r28) 258: 4e 62 c9 73 andi. r9,r30,25166 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h @@ -103,6 +103,7 @@ void arch_setup_new_exec(void); #define TIF_PATCH_PENDING 6 /* pending live patching update */ #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ #define TIF_SINGLESTEP 8 /* singlestepping active */ +#define TIF_NEED_RESCHED_LAZY 9 /* Lazy rescheduling */ #define TIF_SECCOMP 10 /* secure computing */ #define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ #define TIF_NOERROR 12 /* Force successful syscall return */ @@ -117,7 +118,6 @@ void arch_setup_new_exec(void); #endif #define TIF_POLLING_NRFLAG 19 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_32BIT 20 /* 32 bit binary */ -#define TIF_NEED_RESCHED_LAZY 21 /* Lazy rescheduling */