Re: [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR

[Jing Zhang <renyu.zj@linux.alibaba.com>]

在 2025/1/3 上午3:02, Liang, Kan 写道:
> 
> 
> On 2024-12-30 2:11 a.m., Jing Zhang wrote:
>> perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL event
>> because of lack of ch_mask format in drivers, and perf test "104: perf
>> all PMU test (exclusive)" failed.
>>
>> $perf stat -e perf stat -e UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL
>> sleep 1
>>
>> Initial error:
>> event syntax error: 'UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL'
>>                                 \___ unknown term 'ch_mask' for pmu 'uncore_cha_0'
>>
>> 104: perf all PMU test (exclusive)                                   : FAILED!
>>
>> Add ch_mask format for SPR to fix it.
>>
> 
> I don't think there is a ch_mask. It should be extended umask.
> The issue of the CHA extended umask should has been fixed by
> https://lore.kernel.org/lkml/172052531679.2215.16140288595428337453.tip-bot2@tip-bot2/
> 

I think it is not the same issue. I have this patch but still error.

in "tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json",
the event "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL" is described as:
{
        "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
        "Counter": "0,1,2,3",
        "EventCode": "0x35",
        "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x10c0008101",
        "Unit": "CHA"
},

the PortMask is ch_mask, but driver not output ch_mask on SPR, it causes error.

Thanks,
Jing

> Thanks,
> Kan




>> Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
>> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
>> ---
>>  arch/x86/events/intel/uncore_snbep.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
>> index ca98744..e537623 100644
>> --- a/arch/x86/events/intel/uncore_snbep.c
>> +++ b/arch/x86/events/intel/uncore_snbep.c
>> @@ -5967,6 +5967,7 @@ static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev
>>  	&format_attr_inv.attr,
>>  	&format_attr_thresh8.attr,
>>  	&format_attr_filter_tid5.attr,
>> +	&format_attr_ch_mask.attr,
>>  	NULL,
>>  };
>>  static const struct attribute_group spr_uncore_chabox_format_group = {