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Wed, 8 May 2024 08:26:10 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 8 May 2024 08:26:09 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 8 May 2024 08:26:09 -0500 Received: from [172.24.227.88] (uda0500640.dhcp.ti.com [172.24.227.88]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 448DQ5PH102151; Wed, 8 May 2024 08:26:06 -0500 Message-ID: <9f29d226-5c61-ca25-06ef-647769775f45@ti.com> Date: Wed, 8 May 2024 18:56:05 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 1/3] arm64: dts: ti: k3-j722s: Add support for SERDES0 Content-Language: en-US To: Roger Quadros , , CC: , , , , , , , , Ravi Gunasekaran References: <20240429120932.11456-1-r-gunasekaran@ti.com> <20240429120932.11456-2-r-gunasekaran@ti.com> <41047a89-2787-422f-a643-3e2d850da6dd@kernel.org> <588e4d0a-78c6-553f-3c40-0d248f4c92f9@ti.com> <59d8af19-5b2b-486a-9e03-2db2568b0b00@kernel.org> From: Ravi Gunasekaran In-Reply-To: <59d8af19-5b2b-486a-9e03-2db2568b0b00@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 5/8/24 6:32 PM, Roger Quadros wrote: > > > On 08/05/2024 15:34, Ravi Gunasekaran wrote: >> >> >> On 5/8/24 5:29 PM, Roger Quadros wrote: >>> >>> >>> On 29/04/2024 15:09, Ravi Gunasekaran wrote: >>>> Add SERDES0 and its wrapper description to support USB3 >>>> and SGMII interfaces. >>>> >>>> Signed-off-by: Ravi Gunasekaran >>>> --- >>>> arch/arm64/boot/dts/ti/k3-j722s.dtsi | 54 ++++++++++++++++++++++++++++ >>>> 1 file changed, 54 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi >>>> index c75744edb143..beba5a3ea6cc 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi >>>> +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi >>>> @@ -9,6 +9,7 @@ >>>> #include >>>> #include >>>> #include >>>> +#include >>>> >>>> #include "k3-am62p5.dtsi" >>>> >>>> @@ -75,6 +76,50 @@ >>>> <0x00 0x78000000 0x00 0x78000000 0x00 0x00008000>, >>>> <0x00 0x78100000 0x00 0x78100000 0x00 0x00008000>; >>>> }; >>>> + >>>> + serdes_refclk: clock-cmnrefclk { >>> >>> What could be the generic name here? >>> >> >> How about phy-clk or serdes-clk? >> I searched for "fixed-clock" and wide range of naming conventions is followed. > > We shouldn't encode the clock function in the name. How about just clk- ? > where is an integer starting from 0 for such fixed-clocks on the platform? > Sure. I can follow this notation. > e.g. from arch/arm64/boot/dts/ti/k3-am62p5-sk.dts > > tlv320_mclk: clk-0 { > #clock-cells = <0>; > compatible = "fixed-clock"; > clock-frequency = <12288000>; > }; > >> [...] >> > -- Regards, Ravi