From: Dinh Nguyen <dinguyen@kernel.org>
To: niravkumar.l.rabara@intel.com, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id
Date: Mon, 16 Dec 2024 18:56:56 -0600 [thread overview]
Message-ID: <9fac3079-73ad-48ff-bbc1-18494cf5439c@kernel.org> (raw)
In-Reply-To: <20241204063254.296870-1-niravkumar.l.rabara@intel.com>
On 12/4/24 00:32, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Add gpio0 controller node and correct DMA handshake ID for SPI
> tx and rx channels.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> .../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 24 ++++++++++++++++++-
> 1 file changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 1162978329c1..51c6e19e40b8 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -222,6 +222,26 @@ i3c1: i3c@10da1000 {
> status = "disabled";
> };
>
Applied!
Thanks,
Dinh
prev parent reply other threads:[~2024-12-17 0:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-04 6:32 niravkumar.l.rabara
2024-12-17 0:56 ` Dinh Nguyen [this message]
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