From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Sean Christopherson <seanjc@google.com>, Chao Gao <chao.gao@intel.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH] KVM: VMX: Flush shadow VMCS on emergency reboot
Date: Mon, 14 Apr 2025 14:24:32 +0800 [thread overview]
Message-ID: <9ffccab8-5e77-4e55-bd92-f31058600e9f@intel.com> (raw)
In-Reply-To: <Z_lKE-GjP3WQrdkR@google.com>
On 4/12/2025 12:57 AM, Sean Christopherson wrote:
>> If a VMM wants to leverage the VMXOFF behavior, software enumeration
>> might be needed for nested virtualization. Using CPU F/M/S (SPR+) to
>> enumerate a behavior could be problematic for virtualization. Right?
> Yeah, F/M/S is a bad idea. Architecturally, I think the behavior needs to be
> tied to support for SEAM. Is there a safe-ish way to probe for SEAM support,
> without having to glean it from MSR_IA32_MKTME_KEYID_PARTITIONING?
yes, the bit 15 of MSR_IA32_MTRRCAP.
next prev parent reply other threads:[~2025-04-14 6:24 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-24 14:08 Chao Gao
2025-03-31 23:17 ` Huang, Kai
2025-04-10 21:55 ` Sean Christopherson
2025-04-11 8:46 ` Chao Gao
2025-04-11 16:57 ` Sean Christopherson
2025-04-14 6:24 ` Xiaoyao Li [this message]
2025-04-14 12:15 ` Huang, Kai
2025-04-14 13:18 ` Chao Gao
2025-04-15 1:03 ` Sean Christopherson
2025-04-15 1:55 ` Chao Gao
2025-10-08 23:01 ` Sean Christopherson
2025-10-09 5:36 ` Chao Gao
2025-10-10 1:16 ` dan.j.williams
2025-10-10 21:22 ` VMXON for TDX (was: Re: [PATCH] KVM: VMX: Flush shadow VMCS on emergency reboot) Sean Christopherson
2025-05-02 21:51 ` [PATCH] KVM: VMX: Flush shadow VMCS on emergency reboot Sean Christopherson
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