Re: [PATCH][2.5.32] CPU frequency and voltage scaling (0/4)

[Peter Riocreux <peter.riocreux@cakes.org.uk>]

Alan Cox <alan@lxorguk.ukuu.org.uk> writes:

> On Wed, 2002-08-28 at 19:48, Cort Dougan wrote:
> > It's even worse for some of the very new P4's that don't have their
> > heatsink seated properly.  They heat up every few minutes and then throttle
> > themselves due to thermal overload.  I think this situation is going to
> > become more and more common, now.  We're at the mercy of every BIOS and
> 
> Systems designers are designing on the basis of thermal slowdowns being
> the optimal way to build some systems. Its actually quite reasonable for
> many workloads.

Don't forget the low end of the scale too...

An interface of this type even has applicability in the absence of a
clock. Research in the Amulet group at Manchester University (home of
the Amulet processors - self-timed ARM cores) and elsewhere is looking
at management of /maximum/ power consumption (instantaneous power
consumption is a function of the work to be done) by constraining the
maximum number of instructions in flight, rather than the clocked
equivalent of capping the clock frequency. This might be done where
the power supply's capability is very limited (solar, wireless
induction, smartcard, wind, etc).  

This number can be managed by the processor if you build the right
peripheral into the system, and this would need an equivalent
interface for control - it wouldn't be a clock frequency, but it would
be a number controlling the /maximum/ speed of the processor.

Peter