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> But the FML13V01 board uses GPIO21 as pcie1 reset, GPIO28 as pcie1 wakeup; > redefine pcie1 gpio and enable pcie1 for pcie based Wi-Fi. > > Signed-off-by: Sandie Cao > --- > .../jh7110-deepcomputing-fml13v01.dts | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts > index 30b0715196b6..8d9ce8b69a71 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts > +++ b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts > @@ -11,6 +11,40 @@ / { > compatible = "deepcomputing,fml13v01", "starfive,jh7110"; > }; > > +&pcie1 { > + perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>; > + phys = <&pciephy1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie1_pins>; > + status = "okay"; > +}; > + > +&sysgpio { > + pcie1_pins: pcie1-0 { > + clkreq-pins { > + pinmux = + GPOEN_DISABLE, > + GPI_NONE)>; > + bias-pull-down; > + drive-strength = <2>; > + input-enable; > + input-schmitt-disable; > + slew-rate = <0>; > + }; > + > + wake-pins { > + pinmux = + GPOEN_DISABLE, > + GPI_NONE)>; > + bias-pull-up; > + drive-strength = <2>; > + input-enable; > + input-schmitt-disable; > + slew-rate = <0>; > + }; > + }; > +}; > + > &usb0 { > dr_mode = "host"; > status = "okay"; > > base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b Tried this on my device and it works as expected Tested-by: Maud Spierings Kind regards, Maud