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Thu, 9 Oct 2025 05:56:14 +0000 Received: from AS4PR04MB9362.eurprd04.prod.outlook.com ([fe80::e196:11a8:211:feaa]) by AS4PR04MB9362.eurprd04.prod.outlook.com ([fe80::e196:11a8:211:feaa%4]) with mapi id 15.20.9203.007; Thu, 9 Oct 2025 05:56:14 +0000 From: Lakshay Piplani To: Guenter Roeck , "linux-kernel@vger.kernel.org" , "linux-iio@vger.kernel.org" , "jic23@kernel.org" , "dlechner@baylibre.com" , "nuno.sa@analog.com" , "andy@kernel.org" , "marcelo.schmitt1@gmail.com" , "gregkh@linuxfoundation.org" , "viro@zeniv.linux.org.uk" , "peterz@infradead.org" , "jstephan@baylibre.com" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "devicetree@vger.kernel.org" CC: "jdelvare@suse.com" , Vikash Bansal , Priyanka Jain , Shashank Rebbapragada Subject: RE: [EXT] Re: [PATCH v4 0/2] iio: temperature: Add support for NXP P3T175x temperature sensors Thread-Topic: [EXT] Re: [PATCH v4 0/2] iio: temperature: Add support for NXP P3T175x temperature sensors Thread-Index: AQHcODtVgQkUhqSthkK52FB0icuPUrS4SikAgAEHzXA= Date: Thu, 9 Oct 2025 05:56:14 +0000 Message-ID: References: <20251008100713.1198461-1-lakshay.piplani@nxp.com> <96f5443f-5b40-4d05-b350-78d55a1d841d@roeck-us.net> In-Reply-To: <96f5443f-5b40-4d05-b350-78d55a1d841d@roeck-us.net> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9362.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8fc7935e-406c-4b97-e17b-08de06f88e88 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Oct 2025 05:56:14.5895 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: M4jQNn7mYgusS32b0r9jBx/IF8R+hODK4JhjaZggcXHSA839uh02xvfaeBPzkVOazbcDNMCNvjw+RwXp/SMLuw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR04MB10821 > -----Original Message----- > From: Guenter Roeck On Behalf Of Guenter Roeck > Sent: Wednesday, October 8, 2025 7:41 PM > To: Lakshay Piplani ; linux-kernel@vger.kernel.o= rg; > linux-iio@vger.kernel.org; jic23@kernel.org; dlechner@baylibre.com; > nuno.sa@analog.com; andy@kernel.org; marcelo.schmitt1@gmail.com; > gregkh@linuxfoundation.org; viro@zeniv.linux.org.uk; peterz@infradead.org= ; > jstephan@baylibre.com; robh@kernel.org; krzk+dt@kernel.org; > conor+dt@kernel.org; devicetree@vger.kernel.org > Cc: jdelvare@suse.com; Vikash Bansal ; Priyanka > Jain ; Shashank Rebbapragada > > Subject: [EXT] Re: [PATCH v4 0/2] iio: temperature: Add support for NXP > P3T175x temperature sensors >=20 > [You don't often get email from linux@roeck-us.net. Learn why this is > important at https://aka.ms/LearnAboutSenderIdentification ] >=20 > Caution: This is an external email. Please take care when clicking links = or > opening attachments. When in doubt, report the message using the 'Report > this email' button >=20 >=20 > On 10/8/25 03:07, Lakshay Piplani wrote: > > This patch adds support for the P3T1750/P3T1755 temperature sensors > under the IIO subsystem. > > > > P3T1750/P3T1755 support two operational modes: > > 1. Comparator Mode > > 2. Interrupt (Latched) Mode > > > > The HWMON subsystem is more suitable for implementing drivers for > comparator mode operations. > > Reason: > > - Temperature thresholds can be polled and exposed via sysfs. > > - Register reads do not clear status, allowing safe alarm state deri= vation. > > - Matches existing drivers under hwmon. > > > > The IIO subsystem is more suitable for implementing drivers for interru= pt > (latched) mode operations. > > Reason: > > - Interrupt mode uses edge-triggered ALERT/IBI signal interrupts, wh= ich > can be pushed to user space using iio_push_event. > > - IIO's event API (IIO_EV_TYPE_THRESH) supports timestamped > rising/falling edge events. > > - I3C IBI integration maps naturally to IIO's event push model. > > - No persistent alarm bits are available; so polling in HWMON may re= sult in > missing events. > > >=20 > This is just wrong. Interrupt support can just as well be implemented in = a > hwmon driver. >=20 > Guenter Hi Guenter, Thanks - agreed, hwmon drivers can support interrupts. The distinction I meant to highlight is about semantic alignment. Both P3T1750 and P3T1755 does not provide alarm/status bits. In TM=3D1 (int= errupt mode), the alert is latched but cleared on register read, with no way to query alarm state afterward. HWMON typically polls alarm flags via IRQs, expecting them to remain assert= ed during threshold violations. Without persistent bits, supporting interrupts in hwmon would require emula= ting state in software, which diverges from its ABI and could mislead userspace expecting stable *_alarm files. IIO's event API, being edge-triggered and timestamped, aligns more naturall= y with this transient behavior and with I3C IBI signaling. I'll reword the cover letter to clarify that this is a design choice based = on ABI semantics, not a limitation of hwmon. Thanks again for the review. Best regards, Lakshay