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[87.6.90.116]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-496b4ee4504sm205973265e9.6.2026.07.27.01.33.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Jul 2026 01:33:38 -0700 (PDT) Date: Mon, 27 Jul 2026 10:33:35 +0200 From: Ivan Vecera To: Jakub Kicinski CC: netdev@vger.kernel.org, Chris du Quesnay , Arkadiusz Kubalewski , "David S. Miller" , Jiri Pirko , Michal Schmidt , Paolo Abeni , Pasi Vaananen , Petr Oros , Prathosh Satish , Richard Cochran , Simon Horman , Vadim Fedorenko , linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next v2 2/2] dpll: zl3073x: add PTP clock support User-Agent: Thunderbird for Android In-Reply-To: <20260722135848.2d401ada@kernel.org> References: <20260713103739.1553284-1-ivecera@redhat.com> <20260713103739.1553284-3-ivecera@redhat.com> <20260722135848.2d401ada@kernel.org> Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable 22=2E =C4=8Dervence 2026 22:58:48 SEL=C4=8C, Jakub Kicinski napsal: >On Mon, 13 Jul 2026 12:37:39 +0200 Ivan Vecera wrote: >> diff --git a/drivers/dpll/zl3073x/Kconfig b/drivers/dpll/zl3073x/Kconfi= g >> index 5bbca14005813=2E=2Ed0574ad571d3f 100644 >> --- a/drivers/dpll/zl3073x/Kconfig >> +++ b/drivers/dpll/zl3073x/Kconfig >> @@ -2,7 +2,7 @@ >> =20 >> config ZL3073X >> tristate "Microchip Azurite DPLL/PTP/SyncE devices" if COMPILE_TEST >> - depends on NET >> + depends on NET && PTP_1588_CLOCK_OPTIONAL > >Real dependency is probably better here? >The Optional is meant for NICs for which PTP truly is a side-feature=2E > There are some chip variants that don't support PTP=2E Should we depend no= n-optionally? >> +zl3073x_dpll_alloc(struct zl3073x_dev *zldev, u8 ch) > >Would be nice to factor out the code movement to a separate commit to >make this diff easier to follow Yes, will do=2E > >> #include >> #include >> +#include > >spurious include? Yep, will remove=2E > >> +#include >> =20 >> #include "core=2Eh" >> =20 >> @@ -22,6 +24,8 @@ >> * @type: DPLL type (PPS or EEC) >> * @lock_status: last saved DPLL lock status >> * @pins: list of pins >> + * @ptp_info: PTP clock info >> + * @ptp_clock: registered PTP clock (or NULL) >> */ >> struct zl3073x_dpll { >> struct list_head list; >> @@ -36,6 +40,8 @@ struct zl3073x_dpll { >> enum dpll_type type; >> enum dpll_lock_status lock_status; >> struct list_head pins; >> + struct ptp_clock_info ptp_info; >> + struct ptp_clock *ptp_clock; >> }; >> =20 >> struct zl3073x_dpll *zl3073x_dpll_alloc(struct zl3073x_dev *zldev, u8 = ch);