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From: Nadav Amit <nadav.amit@gmail.com>
To: Chuyi Zhou <zhouchuyi@bytedance.com>
Cc: tglx@kernel.org, Ingo Molnar <mingo@redhat.com>,
	luto@kernel.org, peterz@infradead.org, paulmck@kernel.org,
	muchun.song@linux.dev, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	bigeasy@linutronix.de, clrkwllms@kernel.org,
	Steven Rostedt <rostedt@goodmis.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 0/5] x86/mm: Allow preemption while waiting for kernel TLB flushes
Date: Mon, 5 Oct 2026 19:36:32 +0300	[thread overview]
Message-ID: <B1576E3F-E75E-4EBD-93C2-65042017C78A@gmail.com> (raw)
In-Reply-To: <278e53d1-e0ca-4886-a762-ca98d1a21a69@bytedance.com>



> On 5 Oct 2026, at 10:48, Chuyi Zhou <zhouchuyi@bytedance.com> wrote:
> 
> This keeps the common descriptor and threshold policy, while allowing
> preemption during the final IPI completion wait. It does not yet
> provide the broader consolidation you suggested, but retains the
> existing stride_shift field for future kernel stride support.

This one looks better. I’m not pushing for consolidation right now,
but considering the complexity of invlpgb, TCE and stride handling,
I think it makes better sense to look forward a future where the
kernel and the user TLB invalidation paths would be unified.


      reply	other threads:[~2026-10-05 16:36 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-05  5:57 Chuyi Zhou
2026-10-05  5:57 ` [PATCH v2 1/5] x86/mm: Account for remote kernel TLB flush requests Chuyi Zhou
2026-10-05  5:57 ` [PATCH v2 2/5] x86/mm: Share the full TLB flush dispatch Chuyi Zhou
2026-10-05  5:57 ` [PATCH v2 3/5] x86/mm: Extract the TLB range flush threshold check Chuyi Zhou
2026-10-05  5:57 ` [PATCH v2 4/5] x86/mm: Decouple kernel TLB flushes from flush_tlb_info Chuyi Zhou
2026-10-05  5:57 ` [PATCH v2 5/5] x86/mm: Re-enable preemption before waiting for kernel TLB flushes Chuyi Zhou
2026-10-05  6:50 ` [PATCH v2 0/5] x86/mm: Allow preemption while " Nadav Amit
2026-10-05  7:48   ` Chuyi Zhou
2026-10-05 16:36     ` Nadav Amit [this message]

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