mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Daniel Almeida <daniel.almeida@collabora.com>
To: Alexandre Courbot <acourbot@nvidia.com>
Cc: Danilo Krummrich <dakr@kernel.org>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Beata Michalska <beata.michalska@arm.com>,
	nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org,
	John Hubbard <jhubbard@nvidia.com>,
	steven.price@arm.com
Subject: Re: [PATCH v2 01/19] gpu: nova-core: register: minor grammar and spelling fixes
Date: Fri, 25 Jul 2025 13:14:49 -0300	[thread overview]
Message-ID: <B1AA6359-7854-4284-B533-F5CA3C18AF34@collabora.com> (raw)
In-Reply-To: <20250718-nova-regs-v2-1-7b6a762aa1cd@nvidia.com>

Hi Alex. Thank you and John for working on this in general. It will be useful
for the whole ecosystem! :) 

> On 18 Jul 2025, at 04:26, Alexandre Courbot <acourbot@nvidia.com> wrote:
> 
> From: John Hubbard <jhubbard@nvidia.com>
> 
> There is only one top-level macro in this file at the moment, but the
> "macros.rs" file name allows for more. Change the wording so that it
> will remain valid even if additional macros are added to the file.
> 
> Fix a couple of spelling errors and grammatical errors, and break up a
> run-on sentence, for clarity.
> 
> Cc: Alexandre Courbot <acourbot@nvidia.com>
> Cc: Danilo Krummrich <dakr@kernel.org>
> Signed-off-by: John Hubbard <jhubbard@nvidia.com>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
> drivers/gpu/nova-core/regs/macros.rs | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/nova-core/regs/macros.rs b/drivers/gpu/nova-core/regs/macros.rs
> index cdf668073480ed703c89ffa8628f5c9de6494687..864d1e83bed2979f5661e038f4c9fd87d33f69a7 100644
> --- a/drivers/gpu/nova-core/regs/macros.rs
> +++ b/drivers/gpu/nova-core/regs/macros.rs
> @@ -1,17 +1,17 @@
> // SPDX-License-Identifier: GPL-2.0
> 
> -//! Macro to define register layout and accessors.
> +//! `register!` macro to define register layout and accessors.

I would have kept this line as-is. Users will most likely know the name of the
macro already. At this point, they will be looking for what it does, so
mentioning "register" here is a bit redundant IMHO.

> //!
> //! A single register typically includes several fields, which are accessed through a combination
> //! of bit-shift and mask operations that introduce a class of potential mistakes, notably because
> //! not all possible field values are necessarily valid.
> //!
> -//! The macro in this module allow to define, using an intruitive and readable syntax, a dedicated
> -//! type for each register with its own field accessors that can return an error is a field's value
> -//! is invalid.
> +//! The `register!` macro in this module provides an intuitive and readable syntax for defining a
> +//! dedicated type for each register. Each such type comes with its own field accessors that can
> +//! return an error if a field's value is invalid.
> 
> -/// Defines a dedicated type for a register with an absolute offset, alongside with getter and
> -/// setter methods for its fields and methods to read and write it from an `Io` region.
> +/// Defines a dedicated type for a register with an absolute offset, including getter and setter
> +/// methods for its fields and methods to read and write it from an `Io` region.

+cc Steven Price,

Sorry for hijacking this patch, but I think that we should be more flexible and
allow for non-literal offsets in the macro.

In Tyr, for example, some of the offsets need to be computed at runtime, i.e.:

+pub(crate) struct AsRegister(usize);
+
+impl AsRegister {
+    fn new(as_nr: usize, offset: usize) -> Result<Self> {
+        if as_nr >= 32 {
+            Err(EINVAL)
+        } else {
+            Ok(AsRegister(mmu_as(as_nr) + offset))
+        }
+    }

Or:

+pub(crate) struct Doorbell(usize);
+
+impl Doorbell {
+    pub(crate) fn new(doorbell_id: usize) -> Self {
+        Doorbell(0x80000 + (doorbell_id * 0x10000))
+    }

I don't think this will work with the current macro, JFYI.

> ///
> /// Example:
> ///
> @@ -24,7 +24,7 @@
> /// ```
> ///
> /// This defines a `BOOT_0` type which can be read or written from offset `0x100` of an `Io`
> -/// region. It is composed of 3 fields, for instance `minor_revision` is made of the 4 less
> +/// region. It is composed of 3 fields, for instance `minor_revision` is made of the 4 least
> /// significant bits of the register. Each field can be accessed and modified using accessor
> /// methods:
> ///
> 
> -- 
> 2.50.1
> 

Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>


  reply	other threads:[~2025-07-25 16:15 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-18  7:26 [PATCH v2 00/19] gpu: nova-core: register!() macro improvements Alexandre Courbot
2025-07-18  7:26 ` [PATCH v2 01/19] gpu: nova-core: register: minor grammar and spelling fixes Alexandre Courbot
2025-07-25 16:14   ` Daniel Almeida [this message]
2025-07-25 20:43     ` John Hubbard
2025-07-28  4:59     ` Alexandre Courbot
2025-07-28  7:51       ` Steven Price
2025-07-28 11:43         ` Alexandre Courbot
2025-07-28 13:25           ` Steven Price
2025-07-29 13:47             ` Alexandre Courbot
2025-07-30  9:27               ` Steven Price
2025-07-30 12:47                 ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 02/19] gpu: nova-core: register: fix typo Alexandre Courbot
2025-07-18 19:05   ` Boqun Feng
2025-07-22 12:38     ` Alexandre Courbot
2025-07-25 16:18   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 03/19] gpu: nova-core: register: allow fields named `offset` Alexandre Courbot
2025-07-25 16:20   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 04/19] gpu: nova-core: register: improve documentation for basic registers Alexandre Courbot
2025-07-25 16:49   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 05/19] gpu: nova-core: register: simplify @leaf_accessor rule Alexandre Courbot
2025-07-25 16:53   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 06/19] gpu: nova-core: register: remove `try_` accessors for relative registers Alexandre Courbot
2025-07-25 16:55   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 07/19] gpu: nova-core: register: move OFFSET declaration to I/O impl block Alexandre Courbot
2025-07-25 17:03   ` Daniel Almeida
2025-07-28  5:02     ` Alexandre Courbot
2025-07-18  7:26 ` [PATCH v2 08/19] gpu: nova-core: register: fix documentation and indentation Alexandre Courbot
2025-07-25 17:04   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 09/19] gpu: nova-core: register: add missing doccomments for fixed registers I/O accessors Alexandre Courbot
2025-07-25 17:06   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 10/19] gpu: nova-core: register: add fields dispatcher internal rule Alexandre Courbot
2025-07-25 17:38   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 11/19] gpu: nova-core: register: improve `Debug` implementation Alexandre Courbot
2025-07-25 17:49   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 12/19] gpu: nova-core: register: generate correct `Default` implementation Alexandre Courbot
2025-07-25 17:53   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 13/19] gpu: nova-core: register: split @io rule into fixed and relative versions Alexandre Courbot
2025-07-25 17:58   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 14/19] gpu: nova-core: register: use #[inline(always)] for all methods Alexandre Courbot
2025-07-25 17:59   ` Daniel Almeida
2025-07-18  7:26 ` [PATCH v2 15/19] gpu: nova-core: register: redesign relative registers Alexandre Courbot
2025-07-25 18:56   ` Daniel Almeida
2025-07-28  5:07     ` Alexandre Courbot
2025-07-18  7:26 ` [PATCH v2 16/19] gpu: nova-core: falcon: add distinct base address for PFALCON2 Alexandre Courbot
2025-07-18 20:23   ` John Hubbard
2025-07-22 12:39     ` Alexandre Courbot
2025-07-18  7:26 ` [PATCH v2 17/19] gpu: nova-core: register: add support for register arrays Alexandre Courbot
2025-07-25 19:12   ` Daniel Almeida
2025-07-25 19:13     ` Daniel Almeida
2025-07-28  5:12     ` Alexandre Courbot
2025-07-18  7:26 ` [PATCH v2 18/19] gpu: nova-core: falcon: use register arrays for FUSE registers Alexandre Courbot
2025-07-18  7:26 ` [PATCH v2 19/19] gpu: nova-core: register: add support for relative array registers Alexandre Courbot
2025-08-14 22:52 ` [PATCH v2 00/19] gpu: nova-core: register!() macro improvements Lyude Paul
2025-08-15  4:44   ` Alexandre Courbot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=B1AA6359-7854-4284-B533-F5CA3C18AF34@collabora.com \
    --to=daniel.almeida@collabora.com \
    --cc=acourbot@nvidia.com \
    --cc=airlied@gmail.com \
    --cc=beata.michalska@arm.com \
    --cc=dakr@kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=jhubbard@nvidia.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maarten.lankhorst@linux.intel.com \
    --cc=mripard@kernel.org \
    --cc=nouveau@lists.freedesktop.org \
    --cc=rust-for-linux@vger.kernel.org \
    --cc=simona@ffwll.ch \
    --cc=steven.price@arm.com \
    --cc=tzimmermann@suse.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®