From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932898AbbA3QdI (ORCPT ); Fri, 30 Jan 2015 11:33:08 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:58006 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759049AbbA3QdF convert rfc822-to-8bit (ORCPT ); Fri, 30 Jan 2015 11:33:05 -0500 Content-Type: text/plain; charset=windows-1252 Mime-Version: 1.0 (Mac OS X Mail 7.3 \(1878.6\)) Subject: Re: [Patch v2 1/6] soc: qcom: gsbi: Add support for ADM CRCI muxing From: Kumar Gala In-Reply-To: <1422599135-5588-2-git-send-email-agross@codeaurora.org> Date: Fri, 30 Jan 2015 10:32:58 -0600 Cc: linux-arm-msm , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "open list:OPEN FIRMWARE AND..." , Stephen Boyd , Bjorn Andersson , linux-soc@vger.kernel.org Content-Transfer-Encoding: 8BIT Message-Id: References: <1422599135-5588-1-git-send-email-agross@codeaurora.org> <1422599135-5588-2-git-send-email-agross@codeaurora.org> To: Andy Gross X-Mailer: Apple Mail (2.1878.6) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Jan 30, 2015, at 12:25 AM, Andy Gross wrote: > This patch adds automatic configuration for the ADM CRCI muxing required to > support DMA operations for GSBI clients. The GSBI mode and instance determine > the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA > works properly. > > Signed-off-by: Andy Gross > --- > .../devicetree/bindings/soc/qcom/qcom,gsbi.txt | 18 ++- > drivers/soc/qcom/Kconfig | 1 + > drivers/soc/qcom/qcom_gsbi.c | 153 ++++++++++++++++++++ > 3 files changed, 171 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt > index 4ce24d4..8fe7b37 100644 > --- a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt > @@ -6,7 +6,7 @@ configuration settings. The mode setting will govern the input/output mode of > the 4 GSBI IOs. > > Required properties: > -- compatible: must contain "qcom,gsbi-v1.0.0" for APQ8064/IPQ8064 > +- compatible: Should contain "qcom,gsbi-v1.0.0" > - reg: Address range for GSBI registers > - clocks: required clock > - clock-names: must contain "iface" entry > @@ -16,12 +16,16 @@ Required properties: > Optional properties: > - qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference > dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values. > +- syscon-tcsr: indicates phandle of TCSR syscon node. Required if child uses > + dma. > > Required properties if child node exists: > - #address-cells: Must be 1 > - #size-cells: Must be 1 > - ranges: Must be present > > +Note: Each GSBI should have an alias correctly numbered in "aliases" node. > + > Properties for children: > > A GSBI controller node can contain 0 or more child nodes representing serial > @@ -37,6 +41,10 @@ Example for APQ8064: > > #include > > + aliases { > + gsbi4 = <&gsbi4>; > + }; You appear to be using the alias name to determine a index number for the gsbi, if that is the case, than you should probably just add a cell-index node to the gsbi’s for this purpose. > + > gsbi4@16300000 { > compatible = "qcom,gsbi-v1.0.0"; > reg = <0x16300000 0x100>; > @@ -48,6 +56,8 @@ Example for APQ8064: > qcom,mode = ; > qcom,crci = ; > > + syscon-tcsr = <&tcsr>; > + > /* child nodes go under here */ > > i2c_qup4: i2c@16380000 { > @@ -76,3 +86,9 @@ Example for APQ8064: > }; > }; > > + tcsr: syscon@1a400000 { > + compatible = "qcom,apq8064-tcsr", "syscon"; > + reg = <0x1a400000 0x100>; > + }; > + > + - k -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project