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[88.1.105.170]) by smtp.gmail.com with ESMTPSA id i26sm1848858wmb.18.2021.03.04.02.36.30 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 04 Mar 2021 02:36:30 -0800 (PST) From: =?utf-8?Q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 (Mac OS X Mail 14.0 \(3654.60.0.2.21\)) Subject: Re: [PATCH v4 01/15] gpio: guard gpiochip_irqchip_add_domain() with GPIOLIB_IRQCHIP Date: Thu, 4 Mar 2021 11:36:30 +0100 References: <20210304085710.7128-1-noltari@gmail.com> <20210304085710.7128-2-noltari@gmail.com> To: Linus Walleij , Rob Herring , Michael Walle , Bartosz Golaszewski , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, =?utf-8?Q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= , Jonas Gorski , Necip Fazil Yildiran , Andy Shevchenko , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org In-Reply-To: <20210304085710.7128-2-noltari@gmail.com> Message-Id: X-Mailer: Apple Mail (2.3654.60.0.2.21) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add missing tag: Suggested-by: Michael Walle > El 4 mar 2021, a las 9:56, =C3=81lvaro Fern=C3=A1ndez Rojas = escribi=C3=B3: >=20 > The current code doesn't check if GPIOLIB_IRQCHIP is enabled, which = results in > a compilation error when trying to build gpio-regmap if = CONFIG_GPIOLIB_IRQCHIP > isn't enabled. >=20 > Fixes: 6a45b0e2589f ("gpiolib: Introduce = gpiochip_irqchip_add_domain()") > Signed-off-by: =C3=81lvaro Fern=C3=A1ndez Rojas > --- > v4: add patch (fix include instead of gpio-regmap.c) >=20 > include/linux/gpio/driver.h | 9 +++++++++ > 1 file changed, 9 insertions(+) >=20 > diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h > index 286de0520574..ecf0032a0995 100644 > --- a/include/linux/gpio/driver.h > +++ b/include/linux/gpio/driver.h > @@ -624,8 +624,17 @@ void gpiochip_irq_domain_deactivate(struct = irq_domain *domain, > bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, > unsigned int offset); >=20 > +#ifdef CONFIG_GPIOLIB_IRQCHIP > int gpiochip_irqchip_add_domain(struct gpio_chip *gc, > struct irq_domain *domain); > +#else > +static inline int gpiochip_irqchip_add_domain(struct gpio_chip *gc, > + struct irq_domain *domain) > +{ > + WARN_ON(1); > + return -EINVAL; > +} > +#endif >=20 > int gpiochip_generic_request(struct gpio_chip *gc, unsigned int = offset); > void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset); > --=20 > 2.20.1 >=20