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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BY5PR12MB4258.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8556f67c-1021-428a-85c1-08dca4b233fe X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Jul 2024 09:40:46.2724 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: GBFWSmxf9wOYb/iXmvedO+gC8UePQC8EmRFv453naXDU68dtHDXcX57lf4qm55X71rwebQVbn113T4P6XDerHQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7987 Hi Rob, > -----Original Message----- > From: Rob Herring > Sent: Friday, July 12, 2024 4:06 AM > To: Potthuri, Sai Krishna > Cc: Linus Walleij ; Simek, Michal > ; Krzysztof Kozlowski > ; Conor Dooley ; > Buddhabhatti, Jay ; Dhaval Shah > ; Kundanala, Praveen Teja > ; Greg Kroah-Hartman > ; linux-arm-kernel@lists.infradead.org; linux= - > kernel@vger.kernel.org; linux-gpio@vger.kernel.org; > devicetree@vger.kernel.org; saikrishna12468@gmail.com; git (AMD-Xilinx) > > Subject: Re: [PATCH 1/3] dt-bindings: pinctrl: Add support for Xilinx Ver= sal > platform >=20 > On Thu, Jul 11, 2024 at 04:03:15PM +0530, Sai Krishna Potthuri wrote: > > Add Xilinx Versal compatible string and corresponding groups, function > > and pins properties to support pin controller features on Versal platfo= rm. > > > > Signed-off-by: Sai Krishna Potthuri > > --- > > .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 509 > > +++++++++++------- > > 1 file changed, 329 insertions(+), 180 deletions(-) > > > > diff --git > > a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml > > b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml > > index ce66fd15ff9c..68c378b17f49 100644 > > --- > > a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml > > +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.ya > > +++ ml > > @@ -28,7 +28,9 @@ description: | > > > > properties: > > compatible: > > - const: xlnx,zynqmp-pinctrl > > + enum: > > + - xlnx,zynqmp-pinctrl > > + - xlnx,versal-pinctrl > > > > patternProperties: > > '^(.*-)?(default|gpio-grp)$': > > @@ -46,196 +48,334 @@ patternProperties: > > description: > > List of pins to select (either this or "groups" must be = specified) > > items: > > - pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$' > > + allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: xlnx,zynqmp-pinctrl > > + then: > > + pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$' > > + else: > > + pattern: '^((LPD|PMC)_)?MIO([0-9]|[1-6][0-9]|7[0-7= ])$' >=20 > Did you test whether this works? It doesn't because the schema is > nonsense. The schema applies to a property's value, but the "if" schema > applies to a node. And it's not even the node you are at, but the parent > node. IOW, there is no "compatible" in this node. >=20 > The 'else' schema covers both cases, so I'd just change the pattern and b= e > done with it. Ok, got it. Realized now that while testing i used group which is common fo= r both the platforms, might be that is the reason it did not flagged any issu= e. >=20 > However, based on the rest of the patch, you should just do a new schema > doc. There's little overlap of the values. Ok, will create a new binding document for Versal platform. Regards Sai Krishna