RE: [PATCH] tty: serial: qcom-geni-serial: minor fixes to get_clk_div_rate()

["Vijaya Krishna Nivarthi (Temp) (QUIC)" <quic_vnivarth@quicinc.com>]

Hi,


> > >
> > >     ser_clk = 0;
> > >     maxdiv = CLK_DIV_MSK >> CLK_DIV_SHFT;
> > >     div = 1;
> > >     while (div < maxdiv) {
> >
> >
> > div <= maxdiv ?
> 
> Ah, sure.

Thank you.

> 
> 
> > >         mult = (unsigned long long)div * desired_clk;
> > >         if (mult != (unsigned long)mult)
> > >             break;
> > >
> > >         two_percent = mult / 50;
> > >
> > >         /*
> > >          * Loop requesting (freq - 2%) and possibly (freq).
> > >          *
> > >          * We'll keep track of the lowest freq inexact match we found
> > >          * but always try to find a perfect match. NOTE: this algorithm
> > >          * could miss a slightly better freq if there's more than one
> > >          * freq between (freq - 2%) and (freq) but (freq) can't be made
> > >          * exactly, but that's OK.
> > >          *
> > >          * This absolutely relies on the fact that the Qualcomm clock
> > >          * driver always rounds up.
> > >          */
> > >         test_freq = mult - two_percent;
> > >         while (test_freq <= mult) {
> > >             freq = clk_round_rate(clk, test_freq);
> > >
> > >             /*
> > >              * A dead-on freq is an insta-win. This implicitly
> > >              * handles when "freq == mult"
> > >              */
> > >             if (!(freq % desired_clk)) {
> > >                 *clk_div = freq / desired_clk;
> > >                 return freq;
> > >             }
> > >
> > >             /*
> > >              * Only time clock framework doesn't round up is if
> > >              * we're past the max clock rate. We're done searching
> > >              * if that's the case.
> > >              */
> > >             if (freq < test_freq)
> > >                 return ser_clk;
> > >
> > >             /* Save the first (lowest freq) within 2% */
> > >             if (!ser_clk && freq <= mult + two_percent) {
> > >                 ser_clk = freq;
> > >                 *clk_div = div;
> > >             }
> >
> > My last concern is with search happening only within 2% tolerance.
> > Do we fail otherwise?
> >
> > This real case has best tolerance of 1.9% and seems close.
> >
> > [   17.963672] 20220530 desired_clk-51200000
> > [   21.193550] 20220530 returning ser_clk-52174000, div-1, diff-974000
> >
> > Perhaps we can fallback on 1st clock rate?
> 
> I don't feel super comfortable just blindly falling back on the 1st clock rate. It
> could be wildly (more than 5%) wrong, can't it?
> 
> IMO:
> * If you're not comfortable with 2%, you could always pick 3% or 4%.
> As I said, my random web search seemed to indicate that up to 5% was
> perhaps OK.
> * It's probably overkill, but you could abstract the whole search out and try
> searching once for 2% and then try 4%?
>

Ok, I will implement a function that searches within an input tolerance.
And have a conditional 2nd call to same with higher tolerance of 5%.
This would mean that we will still run through 2 loops in some cases, but that’s ok.
Thank you.
 
> 
> -Doug