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([2a00:11b1:101e:447e:2959:9e3d:ac05:c19d]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad52d490789sm127955866b.130.2025.05.16.02.56.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 16 May 2025 02:56:36 -0700 (PDT) Date: Fri, 16 May 2025 11:56:31 +0200 From: Andrew Jones To: kvm-riscv@lists.infradead.org, Atish Patra , Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti CC: kvm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] RISC-V: KVM: Remove scounteren initialization In-Reply-To: <20250515-fix_scounteren_vs-v3-1-729dc088943e@rivosinc.com> References: <20250515-fix_scounteren_vs-v3-1-729dc088943e@rivosinc.com> Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On May 16, 2025 1:11:18 AM GMT+02:00, Atish Patra w= rote: >Scounteren CSR controls the direct access the hpmcounters and cycle/ >instret/time from the userspace=2E It's the supervisor's responsibility >to set it up correctly for it's user space=2E They hypervisor doesn't >need to decide the policy on behalf of the supervisor=2E > >Signed-off-by: Atish Patra >--- >Changes in v3: >- Removed the redundant declaration=20 >- Link to v2: https://lore=2Ekernel=2Eorg/r/20250515-fix_scounteren_vs-v2= -1-1fd8dc0693e8@rivosinc=2Ecom > >Changes in v2: >- Remove the scounteren initialization instead of just setting the TM bit= =2E=20 >- Link to v1: https://lore=2Ekernel=2Eorg/r/20250513-fix_scounteren_vs-v1= -1-c1f52af93c79@rivosinc=2Ecom >--- > arch/riscv/kvm/vcpu=2Ec | 4 ---- > 1 file changed, 4 deletions(-) > >diff --git a/arch/riscv/kvm/vcpu=2Ec b/arch/riscv/kvm/vcpu=2Ec >index 60d684c76c58=2E=2E9bfaae9a11ea 100644 >--- a/arch/riscv/kvm/vcpu=2Ec >+++ b/arch/riscv/kvm/vcpu=2Ec >@@ -111,7 +111,6 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) > { > int rc; > struct kvm_cpu_context *cntx; >- struct kvm_vcpu_csr *reset_csr =3D &vcpu->arch=2Eguest_reset_csr; >=20 > spin_lock_init(&vcpu->arch=2Emp_state_lock); >=20 >@@ -146,9 +145,6 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) > if (kvm_riscv_vcpu_alloc_vector_context(vcpu, cntx)) > return -ENOMEM; >=20 >- /* By default, make CY, TM, and IR counters accessible in VU mode */ >- reset_csr->scounteren =3D 0x7; >- > /* Setup VCPU timer */ > kvm_riscv_vcpu_timer_init(vcpu); >=20 > >--- >base-commit: 01f95500a162fca88cefab9ed64ceded5afabc12 >change-id: 20250513-fix_scounteren_vs-fdd86255c7b7 >-- >Regards, >Atish patra > > Signed-off-by: Andrew Jones