From: mdaljeet@in.ibm.com
To: linux-kernel@vger.kernel.org
Subject: floating point problem
Date: Thu, 5 Jul 2001 21:43:07 +0530 [thread overview]
Message-ID: <CA256A80.005F1790.00@d73mta01.au.ibm.com> (raw)
In Linux PPC, the MSR[FP] bit (that is floating point available bit) is off
(atleast for non-SMP).
Due to this, whenever some floating point instruction is executed in 'user
mode', it leads to a exception 'FPUnavailable'. The exception handler for
this exception apart from setting the MSR[FP] bit, also sets the MSR[FE0]
and MSR[FE1] bits. These bits basically enables the floating point
exceptions so that if there are some floating point exception conditions
encountered while exeuting a floating point instruction, an appropriate
exception is raised.
But whenever some floating point instruction is executed in 'kernel mode',
'FPUnavailabe' exception handler code does not set the 'MSR[FE0] and
MSR[FE1]' bits.
The result is that when we execute a piece of code that executes floating
point instructions with some large values, we get 'floating point
exceptions for overflow etc' but we get some rounded off values when we
execute the same piece of code in a kernel module. We made a modification
in the head.S file and commented out the setting of 'MSR[FE0] and MSR[FE1]'
bits in the 'FPUnavailable' exception handler for user mode. Due to this we
are getting correct results i.e. rounded off values.
Problem is that we want to get the good results without changing the
kernel. Either by having the user mode application to interact with some
special module which can set the MSR[FP] bit before we execute the floating
point instruction or by some other trick.....Is there any solution apart
from changing the kernel?
thanks,
Daljeet.
next reply other threads:[~2001-07-05 17:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-07-05 16:13 mdaljeet [this message]
2001-07-05 17:41 ` Richard B. Johnson
2001-07-06 5:49 ` Paul Mackerras
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