mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Anup Patel <anup@brainfault.org>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	 linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	 atishp@atishpatra.org, paul.walmsley@sifive.com,
	palmer@dabbelt.com,  aou@eecs.berkeley.edu, cleger@rivosinc.com
Subject: Re: [PATCH 3/5] riscv: KVM: Fix SBI IPI error generation
Date: Mon, 17 Feb 2025 16:13:44 +0530	[thread overview]
Message-ID: <CAAhSdy0SScanoz9Q_dm9YBP3bkoGGnM5AXGVWhtUrMcUZ9_=Nw@mail.gmail.com> (raw)
In-Reply-To: <20250217084506.18763-10-ajones@ventanamicro.com>

On Mon, Feb 17, 2025 at 2:15 PM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> When an invalid function ID of an SBI extension is used we should
> return not-supported, not invalid-param. Also, when we see that at
> least one hartid constructed from the base and mask parameters is
> invalid, then we should return invalid-param. Finally, rather than
> relying on overflowing a left shift to result in zero and then using
> that zero in a condition which [correctly] skips sending an IPI (but
> loops unnecessarily), explicitly check for overflow and exit the loop
> immediately.
>
> Fixes: 5f862df5585c ("RISC-V: KVM: Add v0.1 replacement SBI extensions defined in v0.2")
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>

LGTM.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/kvm/vcpu_sbi_replace.c | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c
> index 9c2ab3dfa93a..74e3a38c6a29 100644
> --- a/arch/riscv/kvm/vcpu_sbi_replace.c
> +++ b/arch/riscv/kvm/vcpu_sbi_replace.c
> @@ -51,9 +51,10 @@ static int kvm_sbi_ext_ipi_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
>         struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
>         unsigned long hmask = cp->a0;
>         unsigned long hbase = cp->a1;
> +       unsigned long hart_bit = 0, sentmask = 0;
>
>         if (cp->a6 != SBI_EXT_IPI_SEND_IPI) {
> -               retdata->err_val = SBI_ERR_INVALID_PARAM;
> +               retdata->err_val = SBI_ERR_NOT_SUPPORTED;
>                 return 0;
>         }
>
> @@ -62,15 +63,23 @@ static int kvm_sbi_ext_ipi_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
>                 if (hbase != -1UL) {
>                         if (tmp->vcpu_id < hbase)
>                                 continue;
> -                       if (!(hmask & (1UL << (tmp->vcpu_id - hbase))))
> +                       hart_bit = tmp->vcpu_id - hbase;
> +                       if (hart_bit >= __riscv_xlen)
> +                               goto done;
> +                       if (!(hmask & (1UL << hart_bit)))
>                                 continue;
>                 }
>                 ret = kvm_riscv_vcpu_set_interrupt(tmp, IRQ_VS_SOFT);
>                 if (ret < 0)
>                         break;
> +               sentmask |= 1UL << hart_bit;
>                 kvm_riscv_vcpu_pmu_incr_fw(tmp, SBI_PMU_FW_IPI_RCVD);
>         }
>
> +done:
> +       if (hbase != -1UL && (hmask ^ sentmask))
> +               retdata->err_val = SBI_ERR_INVALID_PARAM;
> +
>         return ret;
>  }
>
> --
> 2.48.1
>

  reply	other threads:[~2025-02-17 10:43 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-17  8:45 [PATCH 0/5] riscv: KVM: Fix a few SBI issues Andrew Jones
2025-02-17  8:45 ` [PATCH 1/5] riscv: KVM: Fix hart suspend status check Andrew Jones
2025-02-17 10:36   ` Anup Patel
2025-02-17  8:45 ` [PATCH 2/5] riscv: KVM: Fix hart suspend_type use Andrew Jones
2025-02-17 10:37   ` Anup Patel
2025-02-17  8:45 ` [PATCH 3/5] riscv: KVM: Fix SBI IPI error generation Andrew Jones
2025-02-17 10:43   ` Anup Patel [this message]
2025-02-17  8:45 ` [PATCH 4/5] riscv: KVM: Fix SBI TIME " Andrew Jones
2025-02-17 10:44   ` Anup Patel
2025-02-17  8:45 ` [PATCH 5/5] riscv: KVM: Fix SBI sleep_type use Andrew Jones
2025-02-17 10:57   ` Anup Patel
2025-02-20 12:17 ` [PATCH 0/5] riscv: KVM: Fix a few SBI issues Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAAhSdy0SScanoz9Q_dm9YBP3bkoGGnM5AXGVWhtUrMcUZ9_=Nw@mail.gmail.com' \
    --to=anup@brainfault.org \
    --cc=ajones@ventanamicro.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=atishp@atishpatra.org \
    --cc=cleger@rivosinc.com \
    --cc=kvm-riscv@lists.infradead.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®