From: Huacai Chen <chenhuacai@kernel.org>
To: Bibo Mao <maobibo@loongson.cn>
Cc: Tianrui Zhao <zhaotianrui@loongson.cn>,
Juergen Gross <jgross@suse.com>,
Paolo Bonzini <pbonzini@redhat.com>,
loongarch@lists.linux.dev, linux-kernel@vger.kernel.org,
virtualization@lists.linux.dev, kvm@vger.kernel.org
Subject: Re: [PATCH v5 3/6] LoongArch: KVM: Add cpucfg area for kvm hypervisor
Date: Sat, 24 Feb 2024 17:13:02 +0800 [thread overview]
Message-ID: <CAAhV-H5eqXMqTYVb6cAVqOsDNcEDeP9HzaMKw69KFQeVaAYEdA@mail.gmail.com> (raw)
In-Reply-To: <20240222032803.2177856-4-maobibo@loongson.cn>
Hi, Bibo,
On Thu, Feb 22, 2024 at 11:28 AM Bibo Mao <maobibo@loongson.cn> wrote:
>
> Instruction cpucfg can be used to get processor features. And there
> is trap exception when it is executed in VM mode, and also it is
> to provide cpu features to VM. On real hardware cpucfg area 0 - 20
> is used. Here one specified area 0x40000000 -- 0x400000ff is used
> for KVM hypervisor to privide PV features, and the area can be extended
> for other hypervisors in future. This area will never be used for
> real HW, it is only used by software.
After reading and thinking, I find that the hypercall method which is
used in our productive kernel is better than this cpucfg method.
Because hypercall is more simple and straightforward, plus we don't
worry about conflicting with the real hardware.
Huacai
>
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> ---
> arch/loongarch/include/asm/inst.h | 1 +
> arch/loongarch/include/asm/loongarch.h | 10 ++++++
> arch/loongarch/kvm/exit.c | 46 +++++++++++++++++---------
> 3 files changed, 41 insertions(+), 16 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm/inst.h
> index d8f637f9e400..ad120f924905 100644
> --- a/arch/loongarch/include/asm/inst.h
> +++ b/arch/loongarch/include/asm/inst.h
> @@ -67,6 +67,7 @@ enum reg2_op {
> revhd_op = 0x11,
> extwh_op = 0x16,
> extwb_op = 0x17,
> + cpucfg_op = 0x1b,
> iocsrrdb_op = 0x19200,
> iocsrrdh_op = 0x19201,
> iocsrrdw_op = 0x19202,
> diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
> index 46366e783c84..a1d22e8b6f94 100644
> --- a/arch/loongarch/include/asm/loongarch.h
> +++ b/arch/loongarch/include/asm/loongarch.h
> @@ -158,6 +158,16 @@
> #define CPUCFG48_VFPU_CG BIT(2)
> #define CPUCFG48_RAM_CG BIT(3)
>
> +/*
> + * cpucfg index area: 0x40000000 -- 0x400000ff
> + * SW emulation for KVM hypervirsor
> + */
> +#define CPUCFG_KVM_BASE 0x40000000UL
> +#define CPUCFG_KVM_SIZE 0x100
> +#define CPUCFG_KVM_SIG CPUCFG_KVM_BASE
> +#define KVM_SIGNATURE "KVM\0"
> +#define CPUCFG_KVM_FEATURE (CPUCFG_KVM_BASE + 4)
> +
> #ifndef __ASSEMBLY__
>
> /* CSR */
> diff --git a/arch/loongarch/kvm/exit.c b/arch/loongarch/kvm/exit.c
> index 923bbca9bd22..6a38fd59d86d 100644
> --- a/arch/loongarch/kvm/exit.c
> +++ b/arch/loongarch/kvm/exit.c
> @@ -206,10 +206,37 @@ int kvm_emu_idle(struct kvm_vcpu *vcpu)
> return EMULATE_DONE;
> }
>
> -static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)
> +static int kvm_emu_cpucfg(struct kvm_vcpu *vcpu, larch_inst inst)
> {
> int rd, rj;
> unsigned int index;
> +
> + rd = inst.reg2_format.rd;
> + rj = inst.reg2_format.rj;
> + ++vcpu->stat.cpucfg_exits;
> + index = vcpu->arch.gprs[rj];
> +
> + /*
> + * By LoongArch Reference Manual 2.2.10.5
> + * Return value is 0 for undefined cpucfg index
> + */
> + switch (index) {
> + case 0 ... (KVM_MAX_CPUCFG_REGS - 1):
> + vcpu->arch.gprs[rd] = vcpu->arch.cpucfg[index];
> + break;
> + case CPUCFG_KVM_SIG:
> + vcpu->arch.gprs[rd] = *(unsigned int *)KVM_SIGNATURE;
> + break;
> + default:
> + vcpu->arch.gprs[rd] = 0;
> + break;
> + }
> +
> + return EMULATE_DONE;
> +}
> +
> +static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)
> +{
> unsigned long curr_pc;
> larch_inst inst;
> enum emulation_result er = EMULATE_DONE;
> @@ -224,21 +251,8 @@ static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)
> er = EMULATE_FAIL;
> switch (((inst.word >> 24) & 0xff)) {
> case 0x0: /* CPUCFG GSPR */
> - if (inst.reg2_format.opcode == 0x1B) {
> - rd = inst.reg2_format.rd;
> - rj = inst.reg2_format.rj;
> - ++vcpu->stat.cpucfg_exits;
> - index = vcpu->arch.gprs[rj];
> - er = EMULATE_DONE;
> - /*
> - * By LoongArch Reference Manual 2.2.10.5
> - * return value is 0 for undefined cpucfg index
> - */
> - if (index < KVM_MAX_CPUCFG_REGS)
> - vcpu->arch.gprs[rd] = vcpu->arch.cpucfg[index];
> - else
> - vcpu->arch.gprs[rd] = 0;
> - }
> + if (inst.reg2_format.opcode == cpucfg_op)
> + er = kvm_emu_cpucfg(vcpu, inst);
> break;
> case 0x4: /* CSR{RD,WR,XCHG} GSPR */
> er = kvm_handle_csr(vcpu, inst);
> --
> 2.39.3
>
next prev parent reply other threads:[~2024-02-24 9:13 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-22 3:27 [PATCH v5 0/6] LoongArch: Add pv ipi support on LoongArch VM Bibo Mao
2024-02-22 3:27 ` [PATCH v5 1/6] LoongArch/smp: Refine some ipi functions on LoongArch platform Bibo Mao
2024-02-22 3:27 ` [PATCH v5 2/6] LoongArch: KVM: Add hypercall instruction emulation support Bibo Mao
2024-02-22 3:28 ` [PATCH v5 3/6] LoongArch: KVM: Add cpucfg area for kvm hypervisor Bibo Mao
2024-02-24 9:13 ` Huacai Chen [this message]
2024-02-26 2:04 ` maobibo
2024-02-26 5:25 ` WANG Xuerui
2024-02-26 8:00 ` maobibo
2024-02-26 8:07 ` WANG Xuerui
2024-02-26 6:12 ` Huacai Chen
2024-02-26 8:04 ` maobibo
2024-02-26 20:02 ` Jiaxun Yang
2024-02-27 3:14 ` maobibo
2024-02-27 5:23 ` Jiaxun Yang
2024-02-27 7:09 ` maobibo
2024-02-27 9:05 ` Xi Ruoyao
2024-02-27 9:52 ` maobibo
2024-02-27 9:10 ` WANG Xuerui
2024-02-27 10:12 ` maobibo
2024-02-27 10:19 ` WANG Xuerui
2024-02-27 14:57 ` Huacai Chen
2024-03-02 2:57 ` maobibo
2024-02-26 2:07 ` maobibo
2024-02-22 3:28 ` [PATCH v5 4/6] LoongArch: Add paravirt interface for guest kernel Bibo Mao
2024-02-24 9:15 ` Huacai Chen
2024-02-26 2:27 ` maobibo
2024-02-22 3:28 ` [PATCH v5 5/6] LoongArch: KVM: Add vcpu search support from physical cpuid Bibo Mao
2024-02-22 3:28 ` [PATCH v5 6/6] LoongArch: Add pv ipi support on LoongArch system Bibo Mao
2024-02-24 9:19 ` Huacai Chen
2024-02-26 2:30 ` maobibo
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