From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C218AC433E6 for ; Sat, 9 Jan 2021 00:47:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B34123AAA for ; Sat, 9 Jan 2021 00:47:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726394AbhAIAqr (ORCPT ); Fri, 8 Jan 2021 19:46:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725815AbhAIAqn (ORCPT ); Fri, 8 Jan 2021 19:46:43 -0500 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F9EEC061573 for ; Fri, 8 Jan 2021 16:46:03 -0800 (PST) Received: by mail-lf1-x132.google.com with SMTP id a12so27196397lfl.6 for ; Fri, 08 Jan 2021 16:46:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Mw14YzBgd2f4GqS6Ml6tp0mY465YwbvUOhYSkNusrc4=; b=u4AGIsz2ZIrp2McYVYJX3vPXdnObweHDpRO5EPmrHdnCSByUodK5p7mw4rmYQt11wl yDCeUyreJB8kFyzDyHME2Jus+TYq2cJ3EjqT9ImGXC82ZUe9P0vFNih8X1pbq+GlKQbr GxpLHMyV/OpTVnYkw0wzdBfQKBDCcug2bmn70c1KST92CienIY8HMXF8+KOqGcKl3y8+ KcNLF43pg6A+9KDn7tF+MrADNgK7Sx6R838fK1Vv9bMTt0uvYgdRCgT04W+7ptKKE6hn AZtXMq4Qf1KvllXvZapyYldiis/g2KpwDfMDVWzcNj1Iserq8GEafATWocPOEb5hpfCP fOQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Mw14YzBgd2f4GqS6Ml6tp0mY465YwbvUOhYSkNusrc4=; b=iqk6rXdn2qxVw7QzfCchf2KpEPQHjXtiS6+Aou92mSYbCWl5yZ831h7ogBq5yrJEjI x/X1Ey2u6ndstxjRWdqkc/XHr5fDHWBjx+AzVbxxLl11MLduJD7sqZ0Y4kaNQREr+d4X N5/QtRzbJeXYYzWM09ivRQZj4gnaMb0exGsdlGfK6a9QYKGItt7MVpZQWpYSp/bC+u7t 4B6UXXkv0V3co3J4QwBBlTfM6qEdJ1LAX7AeEh5wRHPQAk4M3MC2a166bKYoRjg8CTXu Y/dDOtCmfuMoXvQpImXokZ/Wfwe/tH4rNMN/OY4fvAGq9bd29jioI9yKR0PhKp6HoM8v FVUA== X-Gm-Message-State: AOAM5319AJ7YYDNE0B462Y/kNk1CAzY3UW4q4fpAcm/zpIaRx9cXK3eU W1pYwMBNbAHfZguRcsjKHhJledkpYmvb8s7/+g17iQ== X-Google-Smtp-Source: ABdhPJxwbE4VMpwSQLOWkl1Ft/NOE4pAAt9s9j7XhgGCTf2jDv5iWwn6iR9DxhOtxZYEUXwockdfw27lp4/vbPA96u4= X-Received: by 2002:a2e:9dc3:: with SMTP id x3mr2698689ljj.326.1610153161636; Fri, 08 Jan 2021 16:46:01 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Linus Walleij Date: Sat, 9 Jan 2021 01:45:50 +0100 Message-ID: Subject: Re: [PATCH 09/15] gpio: support ROHM BD71815 GPOs To: Matti Vaittinen Cc: Matti Vaittinen , Lee Jones , Bartosz Golaszewski , "linux-kernel@vger.kernel.org" , linux-power@fi.rohmeurope.com, "open list:GPIO SUBSYSTEM" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 8, 2021 at 2:39 PM Matti Vaittinen wrote: > Support GPO(s) found from ROHM BD71815 power management IC. The IC has two > GPO pins but only one is properly documented in data-sheet. The driver > exposes by default only the documented GPO. The second GPO is connected to > E5 pin and is marked as GND in data-sheet. Control for this undocumented > pin can be enabled using a special DT property. > > This driver is derived from work by Peter Yang > although not so much of original is left. > > Signed-off-by: Matti Vaittinen Overall this looks good! > + depends on MFD_ROHM_BD71828 I suppose this makes i possible to merge out-of-order with the core patches actually. > +#define DEBUG Why? Development artifact? > +#include You certainly do not need this. > +#include > +#include I guess registers come from these? Do you need both? Add a comment about what they provide. > + g->chip.ngpio = 1; > + if (g->e5_pin_is_gpo) > + g->chip.ngpio = 2; Overwriting value, how not elegant. if (g->e5_pin_is_gpo) g->chip.ngpio = 2; else g->chip.ngpio = 1; > + g->chip.parent = pdev->dev.parent; > + g->chip.of_node = pdev->dev.parent->of_node; > + g->regmap = dev_get_regmap(pdev->dev.parent, NULL); > + g->dev = &pdev->dev; > + > + ret = devm_gpiochip_add_data(&pdev->dev, &g->chip, g); > + if (ret < 0) { > + dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); > + return ret; > + } It's a bit confusing how you use pdev->dev.parent for some stuff and &pdev->dev for some. What about assinging struct device *dev = pdev->dev.parent; and use dev for all the calls, it looks like it'd work fine. Yours, Linus Walleij