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AJvYcCXfYJMdVnXTp+q/MZ6Mss1HHHVT6mPupCxY2Zfehfc4mcwf2qwwLDnhlRTY1C+pOjmuF2aAorLYQaOS6Kw=@vger.kernel.org X-Gm-Message-State: AOJu0Yyk5tVZQP3nCKRqoGpWHkg7e2X8IJuoX3e0jgcHDBQnzNMNffD/ JVMGT5mw7wEv8D9OhOPbAVi78gd1zKkVdwFZfTLoCXbcFOsUUhwi89H6cBPED7z42jXl75wZu8S gbkUl0xIPozZVvd3KkMwAOYHaZrirzc8= X-Gm-Gg: ASbGncuysKDgnIbs8exXCp3VtrFc0rCR9JR0jJodZU9y22qiHcKKNM3RSSjDUUUhAGP zoIojvJpkd0At+dMb8jJfpSBRr+iNAQhvwSxSPR37Q4Tz/85T5lGUlEtgUQ10F9xBMpYWQ9H6Nv 3ZzLtbMGqxnaxbWtgMnwu+VUc8aTwm/yLsypPwSA7XOqSfXyAJEW3ko6WHm1VU9Qgm5UZPq3AdU ozgp1DcsAJCHLG1DkxOmvy9EFddi61FgAf9okT9m9f3l4VKzNxJBPnn8OlfoUD6m7sYAZien5en BMo7AUvzRclxNnyhsBoC/T9BbD6S X-Google-Smtp-Source: AGHT+IFl8gwtMu07n/A1aLKJxBLYXFQ8b7LX0QsYh0VDEUHPCCS4kOuhgMnVj/cSDzLrERJ0DgTLoo3f5ZhVH1CThI4= X-Received: by 2002:a17:903:1b08:b0:295:2cb6:f498 with SMTP id d9443c01a7336-29b6be8c78cmr343812045ad.7.1764431987374; Sat, 29 Nov 2025 07:59:47 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250204135842.3703751-1-clabbe@baylibre.com> <20250204135842.3703751-2-clabbe@baylibre.com> In-Reply-To: From: Martin Blumenstingl Date: Sat, 29 Nov 2025 16:59:36 +0100 X-Gm-Features: AWmQ_bliYa3gc0anvQ0xsUF_LE36Lett_OnuRRgryLFJY0EHH7Ozn6M0le6CkK0 Message-ID: Subject: Re: [PATCH v8 1/2] usb: serial: add support for CH348 To: Johan Hovold Cc: Corentin Labbe , gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, david@ixit.cz Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Johan, On Wed, Aug 27, 2025 at 12:08=E2=80=AFPM Johan Hovold wr= ote: > > On Mon, Aug 04, 2025 at 11:35:35PM +0200, Martin Blumenstingl wrote: > > On Mon, Aug 4, 2025 at 2:32=E2=80=AFPM Johan Hovold = wrote: > > > On Tue, Jul 29, 2025 at 10:45:20PM +0200, Martin Blumenstingl wrote: > > > > > My general flow is: > > > > - check if we have received THRE - if not: don't transmit more data= on this port > > > > - submit up to two URBs with up to 512 - 3 (CH348_TX_HDRSIZE) bytes= to > > > > not exceed the HW TX FIFO size of 1024 bytes (page 1 in the datashe= et) > > > > if the kfifo has enough data > > > > > > If you're going to wait for the device fifo to clear completely you c= an > > > just use a single urb with larger (1k) buffer too. > > > I set .bulk_out_size =3D 1024 in struct usb_serial_driver. Writing a 1k > > buffer immediately results in: > > ch348 1-1:1.0: device disconnected > > > > I don't know if I need to set some kind of flag on the URB to have it > > split or whether the kernel / USB controller does that automatically > > (as you can tell: I'm not familiar with USB). > > If not: 512 byte transfers at a time it is. > > The host controller should split the buffer, but apparently this crashes > the device firmware. I think having a 512 - 3 (TX header) byte limitation for the TX buffer is acceptable for the first upstream version of this driver. > > > > > > On my test board the CFG pin is HIGH. From how I understand you= , RTS > > > > > > should at least change (even if DTR is in TNOW mode). > > > > > > No matter what I do: both pins are always LOW (right after modp= robe, > > > > > > after opening the console, closing the console again, ...). > > > > > > I even set up the vendor driver to test this: it's the same sit= uation there. > > > > > > > > > > I don't think the console code will assert DTR/RTS, you need to o= pen the > > > > > port as a regular tty. > > > > > > Yes, even if the device is configured in hardware for TNOW mode (inst= ead > > > of DTR function) you should still be able to control RTS (at least as > > > long as the device is not configured for automatic hardware flow cont= rol). > > > I think I made it work, sort of. > > It's a bit annoying because of code I don't understand. It seems that > > R_4 has the following settings: > > 0x00 DTR off > > 0x01 DTR on > > 0x10 RTS off > > 0x11 RTS on > > 0x08 activate (used during port initialization) > > 0x50 HW flow on > > 0x51 no RTS / HW flow off > > > > That said, poking 0x00, 0x01, 0x10 and 0x11 by themselves didn't do muc= h. > > One also has to write 0x06 to the per-port VEN_R register. > > The vendor driver only does that in .set_termios, which I call > > questionable until someone calls me out on this and is willing to > > share a good reason why that's a good idea ;-) > > > > However, I'm unable to control the RTS line of port 1. It works for > > port 0, port 2 and 3 but not for port 1. > > Ports 4-7 don't have the TNOW/DTR and RTS lines routed outside the > > package, so I can't test these. > > Sounds like good progress. Have you made sure HW flow isn't just enabled > by default on port 1 or similar? Unfortunately I don't know how to read the HW flow control state from the hardware. Do you have any suggestions, how I can test HW flow control (after manually enabling it for a port)? I have a logic analyzer and second device (that also supports RTS/CTS) ready so I can measure signals. Maybe there's also software that can help me test (e.g. to trigger CTS yes/no conditions). In case I can't easily figure it out: would you also accept a driver that doesn't support RTS/CTS for its initial version? On another note: after walking away from the driver for some time I came back to day and spotted a comment in usb serial core's usb-serial.c: > /* we don't use num_ports here because some devices have more endpoint pa= irs than ports */ With that I'm now setting num_bulk_out to 8 (number of ports) + 1 (for the config endpoint). This, together with delaying the call to usb_serial_generic_write_bulk_callback() until we receive UART_IIR_THRI allowed me to get rid of the workqueue and re-use a lot more code from the USB serial core. In case you're interested what I came up with, you can find the current code here: [0] Best regards, Martin [0] https://github.com/xdarklight/ch348/blob/90a773410078657c11718821aa4599= 4a7d96712f/ch348.c