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AJvYcCXIl9XovTIwT+zK0dvs/3X2I72GALAxgoKR7hLH6aelrqo/6P03+PyNUwaBW1wD/CtyuF2pKH3KUU0xqD7I5cUWj5sEX9yyhdpLpoBE X-Gm-Message-State: AOJu0YwYSCKB/Ciz7ugfE5bq8GE1f30IjheIBN7gGCVWzzJqsujvL6rT 9XS10saIdaZqdh5kXHXC+F8M6LsJKnB3u+uFRy2auBuVJwo8JQAFxbFPnSDas3HtsiMxaLcD1iG 5fbkPCM9w5grt8U+rpZNzUussZKr2Q/gedf0= X-Google-Smtp-Source: AGHT+IHdTxyAOg082l0qOlmKxPTi37SNPPh9bLaDR9elUWINPRp6JONY42nK76EY6XVisDdPx2gBLzNlljMFJ44PHB8= X-Received: by 2002:a2e:83d0:0:b0:2eb:d9b3:634b with SMTP id 38308e7fff4ca-2ec5b36af6emr84293061fa.46.1719428409868; Wed, 26 Jun 2024 12:00:09 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240626151131.550535-2-torvalds@linux-foundation.org> In-Reply-To: <20240626151131.550535-2-torvalds@linux-foundation.org> From: Uros Bizjak Date: Wed, 26 Jun 2024 20:59:57 +0200 Message-ID: Subject: Re: [PATCH v2] x86-32: fix cmpxchg8b_emu build error with clang To: Linus Torvalds Cc: Ingo Molnar , Borislav Petkov , Peter Zijlstra , linux-kernel@vger.kernel.org, x86@kernel.org, kernel test robot Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Jun 26, 2024 at 5:14=E2=80=AFPM Linus Torvalds wrote: > > The kernel test robot reported that clang no longer compiles the 32-bit > x86 kernel in some configurations due to commit 95ece48165c1 > ("locking/atomic/x86: Rewrite x86_32 arch_atomic64_{,fetch}_{and,or,xor}(= ) > functions"). > > The build fails with > > arch/x86/include/asm/cmpxchg_32.h:149:9: error: inline assembly require= s more registers than available > > and the reason seems to be that not only does the cmpxchg8b instruction > need four fixed registers (EDX:EAX and ECX:EBX), with the emulation > fallback the inline asm also wants a fifth fixed register for the > address (it uses %esi for that, but that's just a software convention > with cmpxchg8b_emu). > > Avoiding using another pointer input to the asm (and just forcing it to > use the "0(%esi)" addressing that we end up requiring for the sw > fallback) seems to fix the issue. > > Reported-by: kernel test robot > Closes: https://lore.kernel.org/oe-kbuild-all/202406230912.F6XFIyA6-lkp@i= ntel.com/ > Fixes: 95ece48165c1 ("locking/atomic/x86: Rewrite x86_32 arch_atomic64_{,= fetch}_{and,or,xor}() functions") > Link: https://lore.kernel.org/all/202406230912.F6XFIyA6-lkp@intel.com/ > Suggested-by: Uros Bizjak > Signed-off-by: Linus Torvalds Reviewed-and-Tested-by: Uros Bizjak > --- > > This is the minimal patch, with the other simplifications removed. > > I still think that the case where somebody passes in a "oldp" that can > change during the cmpxchg is entirely broken, and is not actually valid. > > If it was valid, we'd have to use READ_ONCE() and WRITE_ONCE() in the > "oldp" updates anyway just to make verification tools happy. We don't. > > But hey, that simplification doesn't matter for fixing this build issue, > so let's keep the change minimal. > > arch/x86/include/asm/cmpxchg_32.h | 12 +++++------- > 1 file changed, 5 insertions(+), 7 deletions(-) > > diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmp= xchg_32.h > index ed2797f132ce..62cef2113ca7 100644 > --- a/arch/x86/include/asm/cmpxchg_32.h > +++ b/arch/x86/include/asm/cmpxchg_32.h > @@ -93,10 +93,9 @@ static __always_inline bool __try_cmpxchg64_local(vola= tile u64 *ptr, u64 *oldp, > \ > asm volatile(ALTERNATIVE(_lock_loc \ > "call cmpxchg8b_emu", \ > - _lock "cmpxchg8b %[ptr]", X86_FEATURE_CX= 8) \ > - : [ptr] "+m" (*(_ptr)), \ > - "+a" (o.low), "+d" (o.high) \ > - : "b" (n.low), "c" (n.high), "S" (_ptr) \ > + _lock "cmpxchg8b %a[ptr]", X86_FEATURE_C= X8) \ > + : "+a" (o.low), "+d" (o.high) \ > + : "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \ > : "memory"); \ > \ > o.full; \ > @@ -122,12 +121,11 @@ static __always_inline u64 arch_cmpxchg64_local(vol= atile u64 *ptr, u64 old, u64 > \ > asm volatile(ALTERNATIVE(_lock_loc \ > "call cmpxchg8b_emu", \ > - _lock "cmpxchg8b %[ptr]", X86_FEATURE_CX= 8) \ > + _lock "cmpxchg8b %a[ptr]", X86_FEATURE_C= X8) \ > CC_SET(e) \ > : CC_OUT(e) (ret), \ > - [ptr] "+m" (*(_ptr)), \ > "+a" (o.low), "+d" (o.high) \ > - : "b" (n.low), "c" (n.high), "S" (_ptr) \ > + : "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \ > : "memory"); \ > \ > if (unlikely(!ret)) \ > -- > 2.45.1.209.gc6f12300df >