From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38E2DC433EF for ; Tue, 7 Sep 2021 12:28:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 20E0860F45 for ; Tue, 7 Sep 2021 12:28:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344144AbhIGM3L (ORCPT ); Tue, 7 Sep 2021 08:29:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234142AbhIGM3E (ORCPT ); Tue, 7 Sep 2021 08:29:04 -0400 Received: from mail-qt1-x82e.google.com (mail-qt1-x82e.google.com [IPv6:2607:f8b0:4864:20::82e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1AE2C061757 for ; Tue, 7 Sep 2021 05:27:57 -0700 (PDT) Received: by mail-qt1-x82e.google.com with SMTP id c19so7722687qte.7 for ; Tue, 07 Sep 2021 05:27:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=WazygCXGIt0oTRoPxuhpgEJkZwMCzOdNrpXcapD6IMQ=; b=L/y9MxYCco9ZCQyc7JqOQbveaeL7yhvAnHpMIYeiTpx4hjqmrG9hQodGGT0d8VXqOu Gm9iF1/C4HrM5ieUokxjwdIYYjmZjyPchGaP1OcYUcTysdb5DbH5xwBN767Ma7PsGcH+ DRCXRFH4B6TKGbm5fbOezD0Ki16vHifMMKQpU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=WazygCXGIt0oTRoPxuhpgEJkZwMCzOdNrpXcapD6IMQ=; b=uTCTpC4Vk0mkWUQgJZxqmueqRy+ewsT1MOw8eFag62SJpgK75qOxHXJkSwJojzV9x0 IJmQbpSYbLXOd0Xu/HKfee6da67N9uTEXXHLzzrfd4qtdxieGVh8daWMWmEdEeftV0O0 EEEEAWAxdzL7cIlOX+ZX/yCUvisxchUhPPlYblrklx7Z3xDyb7a3xaMRBqrYuFGUCiTV GM4+DdcEE78HzO8wGlbo2AAIdSKzTgMYhcwrRuDifVtrBLNXKC86ki/+QduQRMfRJ3rP 5KmfuWYTGNdaEYPkFnjXrMN02vB1os8ZltAjRoSUV/sgkv6f4kmTOhrBp9amTv10XoS5 KXcw== X-Gm-Message-State: AOAM530YVknVKJZkYtLrytPcji7e77l3M2F71DzYultNBN/lTu5OHN6w U//98UYxoLpb0uRFQczzxhpNKq1R1ziQeCIahuDI5w== X-Google-Smtp-Source: ABdhPJyi+j+8R4WVWLZ33fUYunDQD0QKbKyw0r+Z98UCxjGkJzFsMjOjzhdmUuElK2X1vli9DvbtMH6AQV9U8Cf1ugY= X-Received: by 2002:ac8:5a13:: with SMTP id n19mr14999884qta.380.1631017676983; Tue, 07 Sep 2021 05:27:56 -0700 (PDT) MIME-Version: 1.0 References: <20210907102722.47543-1-bert@biot.com> <20210907102722.47543-5-bert@biot.com> In-Reply-To: From: Daniel Palmer Date: Tue, 7 Sep 2021 21:27:46 +0900 Message-ID: Subject: Re: [PATCH v2 4/5] ARM: Add basic support for Airoha EN7523 SoC To: Arnd Bergmann Cc: Bert Vermeulen , Russell King , Linus Walleij , Andrew Morton , Geert Uytterhoeven , Anshuman Khandual , Marc Zyngier , Mark Rutland , John Crispin , Ard Biesheuvel , YiFei Zhu , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Mike Rapoport , linux-arm-kernel , Linux Kernel Mailing List , DTML Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Arnd, On Tue, 7 Sept 2021 at 20:52, Arnd Bergmann wrote: > > Off-topic but related: Another MediaTek spin off, SigmaStar, seems to > > have done exactly the same thing. Cortex A53 chip running as a 32bit > > system to avoid having to fix their software. I'm interested to see if > > this makes it into arm or arm64. :) > > Maybe it's best to just add them to both at the same time? The boot > loader situation might take a bit to work out, but in theory this should > be fixable. I wonder how fixable it would be.. I haven't gotten a board with the chip in question (SSD268G) yet but from looking at some firmware binaries I can see that even u-boot is a 6 year old 32bit version. As far as I can tell there's no PSCI, ATF etc that I think would be expected for an arm64 machine. I think the broken memory controller is still there so somehow I'd need to get the heavy barrier to work in arm64. I haven't yet worked out if that's even possible. I think they are advertising that it supports up to 2GB of DDR. So it's a hobbled 64bit capable system with highmem. Putting most of the DT bits under arm64 even though it's so broken it'll only ever boot a 32bit kernel makes sense to me. Better than having lots of arm64 typical stuff like a newer GIC in a file under arm and confusing everyone that comes across it. Cheers, Daniel