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[209.85.166.52]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4d8888c31f3sm3082224173.115.2024.10.02.06.12.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Oct 2024 06:12:35 -0700 (PDT) Received: by mail-io1-f52.google.com with SMTP id ca18e2360f4ac-8325044e388so309917439f.0; Wed, 02 Oct 2024 06:12:35 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCWHSsfuH+c6rIaqRRNjh9aEYNoSGm0AgJ3EfROOXisrSAYjUnvZwV8aWf6EI91Z4A239Ym3/jAkrQ4=@vger.kernel.org, AJvYcCXSKxETQqG/nLEBAkx6hCEmS+zbZAN7XpZI5D+1UDY/8YAQGabsc+8ijMOZeUzT0u829hoWz6r2n/g1DebW@vger.kernel.org, AJvYcCXgE36yISfnD4qEXt4iR+CAkERnENoMr02FfrTHU12r7VuWRcFShu5sNgWJylkdWYML8g+82VG0JEzt@vger.kernel.org X-Received: by 2002:a05:6602:134f:b0:82c:f30d:fc9b with SMTP id ca18e2360f4ac-834d853a0eemr362057239f.13.1727874755504; Wed, 02 Oct 2024 06:12:35 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240919091834.83572-1-sebastian.reichel@collabora.com> In-Reply-To: Reply-To: wens@csie.org From: Chen-Yu Tsai Date: Wed, 2 Oct 2024 21:12:20 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 0/6] Fix RK3588 GPU domain To: Ulf Hansson Cc: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Elaine Zhang , =?UTF-8?Q?Adri=C3=A1n_Mart=C3=ADnez_Larumbe?= , Boris Brezillon , devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, kernel@collabora.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Oct 2, 2024 at 7:00=E2=80=AFPM Ulf Hansson = wrote: > > On Thu, 19 Sept 2024 at 11:18, Sebastian Reichel > wrote: > > > > Hi, > > > > I got a report, that the Linux kernel crashes on Rock 5B when the panth= or > > driver is loaded late after booting. The crash starts with the followin= g > > shortened error print: > > > > rockchip-pm-domain fd8d8000.power-management:power-controller: failed t= o set domain 'gpu', val=3D0 > > rockchip-pm-domain fd8d8000.power-management:power-controller: failed t= o get ack on domain 'gpu', val=3D0xa9fff > > SError Interrupt on CPU4, code 0x00000000be000411 -- SError > > > > This series first does some cleanups in the Rockchip power domain > > driver and changes the driver, so that it no longer tries to continue > > when it fails to enable a domain. This gets rid of the SError interrupt > > and long backtraces. But the kernel still hangs when it fails to enable > > a power domain. I have not done further analysis to check if that can > > be avoided. > > > > Last but not least this provides a fix for the GPU power domain failing > > to get enabled - after some testing from my side it seems to require th= e > > GPU voltage supply to be enabled. > > > > I'm not really happy about the hack to get a regulator for a sub-node, > > which I took over from the Mediatek driver. I discussed this with > > Chen-Yu Tsai and Heiko St=C3=BCbner at OSS EU and the plan is: > > > > 1. Merge Rockchip PM domain driver with this hack for now, since DRM CI > > people need it > > 2. Chen-Yu will work on a series, which fixes the hack in Mediatek by > > introducing a new devm_regulator_get function taking an DT node as > > additional argument > > 3. Rockchip PM domain later will switch to that once it has landed > > I have just queued up 2) on my next branch. > > My suggestion is to skip the intermediate step in 1) and go directly > for 3) instead, unless you think there is a problem with that, of > course? I don't think we were expecting things to get merged so soon. And IIRC Sebastian went on vacation after Plumbers for two weeks. ChenYu