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Mon, 17 Aug 2026 02:15:49 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: ludloff@gmail.com From: Christian Ludloff Date: Mon, 17 Aug 2026 02:15:37 -0700 X-Gm-Features: AcwNN1VoHPMvEgo7CRiAOv7uxjSL5aOXk82VENOs6qHh9YsNgrbtAYh4ll9-04k Message-ID: Subject: Re: X86: Question about GDT loading To: "H. Peter Anvin" Cc: Alexandre , x86@kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" >> It is intended. Slot 0 in the GDT is not used, so it is a pretty common >> convention to stuff the pointer to the GDT itself into that slot. >> >> For 32 bits that is perfectly safe. On 64 bits, it ends up taking up slot 1 as >> well; this is *not* safe for a kernel address as it would be interpreted as a >> user-space code descriptor for a single-byte code segment somewhere in the low >> 16 MB of memory, addressable as 0x13:0. This could be used to derive bits >> [55:32] of the kernel GDT base from user space. > > Corrected: addressable as 0xb:0. > >> Therefore this must NOT be done in 64-bit mode. > > Formally speaking: long mode. A mixed-mode GDT can safely place a task gate descriptor at GDT offset 8 though, because the first two bytes of it are reserved/ignored (in legacy mode) and because task gates are no longer used/supported (in long mode). https://www.sandpile.org/x86/desc.htm So the technique still works... if GDTR base [63:32] is zero; else two copies of the GDT end up being used (assuming a LGDT in legacy mode, then a mode switch, then a LGDT in long mode again [to load the upper base bits]). The technique itself does go back at least to the early '90s: https://www.rcollins.org/Productivity/NullDescriptor.html -- C.