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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci <linux-pci@vger.kernel.org>,
	Fan Fei <ffclaire1224@gmail.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh@kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-kernel-mentees@lists.linuxfoundation.org,
	Shuah Khan <skhan@linuxfoundation.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v2 17/23] PCI: mt7621: Rename mt7621_pci_ to mt7621_pcie_
Date: Thu, 23 Dec 2021 07:10:22 +0100	[thread overview]
Message-ID: <CAMhs-H_dTkp6_1Loq973JqotW26GtRYQv-vdQ2i6Heo7oGCL3w@mail.gmail.com> (raw)
In-Reply-To: <20211223011054.1227810-18-helgaas@kernel.org>

Hi Bjorn,

On Thu, Dec 23, 2021 at 2:11 AM Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> From: Bjorn Helgaas <bhelgaas@google.com>
>
> Rename mt7621_pci_* structs and functions to mt7621_pcie_* for consistency
> with the rest of the file.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> Cc: Matthias Brugger <matthias.bgg@gmail.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-mediatek@lists.infradead.org
> ---
>  drivers/pci/controller/pcie-mt7621.c | 36 ++++++++++++++--------------
>  1 file changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-mt7621.c b/drivers/pci/controller/pcie-mt7621.c
> index 4138c0e83513..b8fea7afdb1b 100644
> --- a/drivers/pci/controller/pcie-mt7621.c
> +++ b/drivers/pci/controller/pcie-mt7621.c
> @@ -93,8 +93,8 @@ struct mt7621_pcie_port {
>   * reset lines are inverted.
>   */
>  struct mt7621_pcie {
> -       void __iomem *base;
>         struct device *dev;
> +       void __iomem *base;

This change is unrelated to the commit message and the rest of the
changes of this patch.

>         struct list_head ports;
>         bool resets_inverted;
>  };
> @@ -129,7 +129,7 @@ static inline void pcie_port_write(struct mt7621_pcie_port *port,
>         writel_relaxed(val, port->base + reg);
>  }
>
> -static inline u32 mt7621_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
> +static inline u32 mt7621_pcie_get_cfgaddr(unsigned int bus, unsigned int slot,
>                                          unsigned int func, unsigned int where)
>  {
>         return (((where & 0xf00) >> 8) << 24) | (bus << 16) | (slot << 11) |
> @@ -140,7 +140,7 @@ static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
>                                          unsigned int devfn, int where)
>  {
>         struct mt7621_pcie *pcie = bus->sysdata;
> -       u32 address = mt7621_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn),
> +       u32 address = mt7621_pcie_get_cfgaddr(bus->number, PCI_SLOT(devfn),
>                                              PCI_FUNC(devfn), where);
>
>         writel_relaxed(address, pcie->base + RALINK_PCI_CONFIG_ADDR);
> @@ -148,7 +148,7 @@ static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
>         return pcie->base + RALINK_PCI_CONFIG_DATA + (where & 3);
>  }
>
> -static struct pci_ops mt7621_pci_ops = {
> +static struct pci_ops mt7621_pcie_ops = {
>         .map_bus        = mt7621_pcie_map_bus,
>         .read           = pci_generic_config_read,
>         .write          = pci_generic_config_write,
> @@ -156,7 +156,7 @@ static struct pci_ops mt7621_pci_ops = {
>
>  static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
>  {
> -       u32 address = mt7621_pci_get_cfgaddr(0, dev, 0, reg);
> +       u32 address = mt7621_pcie_get_cfgaddr(0, dev, 0, reg);
>
>         pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
>         return pcie_read(pcie, RALINK_PCI_CONFIG_DATA);
> @@ -165,7 +165,7 @@ static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
>  static void write_config(struct mt7621_pcie *pcie, unsigned int dev,
>                          u32 reg, u32 val)
>  {
> -       u32 address = mt7621_pci_get_cfgaddr(0, dev, 0, reg);
> +       u32 address = mt7621_pcie_get_cfgaddr(0, dev, 0, reg);
>
>         pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
>         pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA);
> @@ -505,16 +505,16 @@ static int mt7621_pcie_register_host(struct pci_host_bridge *host)
>  {
>         struct mt7621_pcie *pcie = pci_host_bridge_priv(host);
>
> -       host->ops = &mt7621_pci_ops;
> +       host->ops = &mt7621_pcie_ops;
>         host->sysdata = pcie;
>         return pci_host_probe(host);
>  }
>
> -static const struct soc_device_attribute mt7621_pci_quirks_match[] = {
> +static const struct soc_device_attribute mt7621_pcie_quirks_match[] = {
>         { .soc_id = "mt7621", .revision = "E2" }
>  };
>
> -static int mt7621_pci_probe(struct platform_device *pdev)
> +static int mt7621_pcie_probe(struct platform_device *pdev)
>  {
>         struct device *dev = &pdev->dev;
>         const struct soc_device_attribute *attr;
> @@ -535,7 +535,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
>         platform_set_drvdata(pdev, pcie);
>         INIT_LIST_HEAD(&pcie->ports);
>
> -       attr = soc_device_match(mt7621_pci_quirks_match);
> +       attr = soc_device_match(mt7621_pcie_quirks_match);
>         if (attr)
>                 pcie->resets_inverted = true;
>
> @@ -572,7 +572,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
>         return err;
>  }
>
> -static int mt7621_pci_remove(struct platform_device *pdev)
> +static int mt7621_pcie_remove(struct platform_device *pdev)
>  {
>         struct mt7621_pcie *pcie = platform_get_drvdata(pdev);
>         struct mt7621_pcie_port *port;
> @@ -583,18 +583,18 @@ static int mt7621_pci_remove(struct platform_device *pdev)
>         return 0;
>  }
>
> -static const struct of_device_id mt7621_pci_ids[] = {
> +static const struct of_device_id mt7621_pcie_ids[] = {
>         { .compatible = "mediatek,mt7621-pci" },
>         {},
>  };
> -MODULE_DEVICE_TABLE(of, mt7621_pci_ids);
> +MODULE_DEVICE_TABLE(of, mt7621_pcie_ids);
>
> -static struct platform_driver mt7621_pci_driver = {
> -       .probe = mt7621_pci_probe,
> -       .remove = mt7621_pci_remove,
> +static struct platform_driver mt7621_pcie_driver = {
> +       .probe = mt7621_pcie_probe,
> +       .remove = mt7621_pcie_remove,
>         .driver = {
>                 .name = "mt7621-pci",
> -               .of_match_table = of_match_ptr(mt7621_pci_ids),
> +               .of_match_table = of_match_ptr(mt7621_pcie_ids),
>         },
>  };
> -builtin_platform_driver(mt7621_pci_driver);
> +builtin_platform_driver(mt7621_pcie_driver);
> --
> 2.25.1
>

Other than that minor unrelated change, this looks good to me:

Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

Best regards,
    Sergio Paracuellos

  reply	other threads:[~2021-12-23  6:10 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-23  1:10 [PATCH v2 00/23] PCI: Name structs, functions consistently Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 01/23] PCI: altera: Prefer of_device_get_match_data() Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 02/23] PCI: artpec6: " Bjorn Helgaas
2021-12-25 13:30   ` Jesper Nilsson
2021-12-23  1:10 ` [PATCH v2 03/23] PCI: cadence: " Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 04/23] PCI: designware-plat: " Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 05/23] PCI: dra7xx: " Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 06/23] PCI: keystone: " Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 07/23] PCI: kirin: " Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 08/23] PCI: j721e: Drop pointless of_device_get_match_data() cast Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 09/23] PCI: j721e: Drop redundant struct device * Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 10/23] PCI: intel-gw: Rename intel_pcie_port to intel_pcie Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 11/23] PCI: iproc: Rename iproc_pcie_bcma_ to iproc_bcma_pcie_ Bjorn Helgaas
2022-01-04 18:34   ` Ray Jui
2021-12-23  1:10 ` [PATCH v2 12/23] PCI: iproc: Rename iproc_pcie_pltfm_ to iproc_pltfm_pcie_ Bjorn Helgaas
2022-01-04 18:34   ` Ray Jui
2021-12-23  1:10 ` [PATCH v2 13/23] PCI: ls-gen4: Rename ls_pcie_g4 to ls_g4_pcie Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 14/23] PCI: mediatek-gen3: Rename mtk_pcie_port to mtk_gen3_pcie Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 15/23] PCI: microchip: Rename mc_port to mc_pcie Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 16/23] PCI: mt7621: Make pci_ops static Bjorn Helgaas
2021-12-23  6:04   ` Sergio Paracuellos
2021-12-23 16:40     ` Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 17/23] PCI: mt7621: Rename mt7621_pci_ to mt7621_pcie_ Bjorn Helgaas
2021-12-23  6:10   ` Sergio Paracuellos [this message]
2021-12-23 16:43     ` Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 18/23] PCI: rcar-gen2: Rename rcar_pci_priv to rcar_pci Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 19/23] PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 20/23] PCI: uniphier: Rename uniphier_pcie_priv to uniphier_pcie Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 21/23] PCI: xgene: Rename xgene_pcie_port to xgene_pcie Bjorn Helgaas
2021-12-23  1:10 ` [PATCH v2 22/23] PCI: xilinx: Rename xilinx_pcie_port to xilinx_pcie Bjorn Helgaas
2022-01-03  8:39   ` Michal Simek
2021-12-23  1:10 ` [PATCH v2 23/23] PCI: xilinx-cpm: Rename xilinx_cpm_pcie_port to xilinx_cpm_pcie Bjorn Helgaas
2022-01-03  8:39   ` Michal Simek
2021-12-26 12:04 ` [PATCH v2 00/23] PCI: Name structs, functions consistently Lorenzo Pieralisi

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