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Wed, 10 Apr 2024 05:31:24 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCXHDoN8GRWgauZF/ARRmUd1t0zsIrDvWoW9YUvZ0cL6X7xLocOeiyHBJeqscwjSjfb5ahDcZqNEiBhn0Ugw0yo3+bRQk+db53GWPT5B X-Gm-Message-State: AOJu0Yxw2XoytuDFQ1tFgaPkZAFK1dibDFrjdO9r6CmfOU2c4hFbzgZJ 5KWOkz831bAOpTPQExvZKCc6wVMb+K0M4U95/V5O941BBhNNGPgBF4O69PSqcahNmI4mBbE15gY G57h48zkxok5nBP53BazOAW/ikTw= X-Google-Smtp-Source: AGHT+IHuT+XFJeaCh2hGEm5AckPvyGrE/Qv7aBbddDEfGsyOioWKVti/1UfUWWfzQXrhcXJDtYUrnzGBIVAch+SaVvU= X-Received: by 2002:a05:651c:21c:b0:2d8:84a0:357a with SMTP id y28-20020a05651c021c00b002d884a0357amr1761988ljn.33.1712752283038; Wed, 10 Apr 2024 05:31:23 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240409164641.GC3219862@dev-arch.thelio-3990X> <20240410024126.21589-1-zhuqiuer1@huawei.com> <20240410024126.21589-2-zhuqiuer1@huawei.com> In-Reply-To: <20240410024126.21589-2-zhuqiuer1@huawei.com> From: Ard Biesheuvel Date: Wed, 10 Apr 2024 14:31:11 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2] ARM: Add a memory clobber to the fmrx instruction To: zhuqiuer Cc: nathan@kernel.org, justinstitt@google.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux@armlinux.org.uk, llvm@lists.linux.dev, morbo@google.com, ndesaulniers@google.com Content-Type: text/plain; charset="UTF-8" On Wed, 10 Apr 2024 at 04:41, zhuqiuer wrote: > > The instruction fmrx is used throughout the kernel, > where it is sometimes expected to be skipped > by incrementing the program counter, such as in vfpmodule.c:vfp_init(). > Therefore, the instruction should not be reordered when it is not intended. > Adding a barrier() instruction before and after this call cannot prevent > reordering by the compiler, as the fmrx instruction is constrained > by '=r', meaning it works on the general register but not on memory. > To ensure the order of the instruction after compiling, > adding a memory clobber is necessary. > > Below is the code snippet disassembled from the method: > vfpmodule.c:vfp_init(), compiled by LLVM. > > Before the patching: > xxxxx: xxxxx bl c010c688 > xxxxx: xxxxx mov r0, r4 > xxxxx: xxxxx bl c010c6e4 > ... > xxxxx: xxxxx bl c0791c8c > xxxxx: xxxxx movw r5, #23132 ; 0x5a5c > xxxxx: xxxxx vmrs r4, fpsid <- this is the fmrx instruction > > After the patching: > xxxxx: xxxxx bl c010c688 > xxxxx: xxxxx mov r0, r4 > xxxxx: xxxxx vmrs r5, fpsid <- this is the fmrx instruction > xxxxx: xxxxx bl c010c6e4 > > Signed-off-by: zhuqiuer This also fixes the issue I observed so Reviewed-by: Ard Biesheuvel > --- > arch/arm/vfp/vfpinstr.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h > index 3c7938fd40aa..ae2c9b9b7701 100644 > --- a/arch/arm/vfp/vfpinstr.h > +++ b/arch/arm/vfp/vfpinstr.h > @@ -68,14 +68,14 @@ > u32 __v; \ > asm(".fpu vfpv2\n" \ > "vmrs %0, " #_vfp_ \ > - : "=r" (__v) : : "cc"); \ > + : "=r" (__v) : : "memory", "cc"); \ > __v; \ > }) > > #define fmxr(_vfp_,_var_) \ > asm(".fpu vfpv2\n" \ > "vmsr " #_vfp_ ", %0" \ > - : : "r" (_var_) : "cc") > + : : "r" (_var_) : "memory", "cc") > > #else > > -- > 2.12.3 >