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[209.85.221.175]) by smtp.gmail.com with ESMTPSA id ada2fe7eead31-5eb1ac64f63sm4683750137.10.2025.12.23.08.04.20 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 Dec 2025 08:04:21 -0800 (PST) Received: by mail-vk1-f175.google.com with SMTP id 71dfb90a1353d-55b0d4b560aso3965771e0c.0 for ; Tue, 23 Dec 2025 08:04:20 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCV4fosTenkWCZillExY05zwHP3gsHlNSt+aCWGlNECIQQnUORXpYiIXdV7M92eN786l7LUWuY8D4dl97Bc=@vger.kernel.org X-Received: by 2002:a05:6122:1d91:b0:559:6b7f:b0f4 with SMTP id 71dfb90a1353d-5615b851ddemr5491694e0c.5.1766505860287; Tue, 23 Dec 2025 08:04:20 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20251201134229.600817-1-cosmin-gabriel.tanislav.xa@renesas.com> <20251201134229.600817-13-cosmin-gabriel.tanislav.xa@renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Tue, 23 Dec 2025 17:04:09 +0100 X-Gmail-Original-Message-ID: X-Gm-Features: AQt7F2r8FcJNMBmChD_xiGNEJI2gOR_iQl7z1azyYjzKxdOKv8tEtQ1DkplXGqY Message-ID: Subject: Re: [PATCH 12/13] arm64: dts: renesas: r9a09g077: wire up DMA support for SPI To: Cosmin-Gabriel Tanislav Cc: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , "magnus.damm" , Philipp Zabel , "linux-spi@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Hi Cosmin, On Tue, 23 Dec 2025 at 15:42, Cosmin-Gabriel Tanislav wrote: > > From: Geert Uytterhoeven > > On Mon, 1 Dec 2025 at 14:44, Cosmin Tanislav > > wrote: > > > RZ/T2H (R9A09G077) has three DMA controllers that can be used by > > > peripherals like SPI to offload data transfers from the CPU. > > > > > > Wire up the DMA channels for the SPI peripherals. > > > > > > Signed-off-by: Cosmin Tanislav > > > > Thanks for your patch! > > > > > --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi > > > +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi > > > @@ -200,6 +200,8 @@ rspi0: spi@80007000 { > > > clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, > > > <&cpg CPG_MOD 104>; > > > clock-names = "pclk", "pclkspi"; > > > + dmas = <&dmac0 0x267a>, <&dmac0 0x267b>; > > > + dma-names = "rx", "tx"; > > > > RZ/T2H does not seem to have restrictions about which DMA controllers > > can be used by which SPI instance. Hence shouldn't these point to > > all three DMA controllers? > > It does seem like there's no restriction about which DMA controller to > use. > > > dmas = <&dmac0 0x267a>, <&dmac0 0x267b>, > > <&dmac1 0x267a>, <&dmac1 0x267b>, > > <&dmac2 0x267a>, <&dmac2 0x267b>; > > dma-names = "rx", "tx", "rx", "tx", "rx", "tx"; > > > > I was not aware that the DMA core supports this. I will add the other DMA > controllers to the list. > > > Note that this requires updating the DT bindings, as they currently > > restrict dma to two entries. > > dma-names: > items: > enum: > - rx > - tx > > This should work fine, right? Yes, dma-names is OK. But currently dmas has "maxItems: 2". Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds