From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Mike Turquette <mturquette@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Stephen Boyd <sboyd@codeaurora.org>,
Rob Herring <robh+dt@kernel.org>,
Linux-sh list <linux-sh@vger.kernel.org>,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v3 resend] clk-rcar-gen2: ADSP clock support
Date: Wed, 7 Jan 2015 09:19:48 +0100 [thread overview]
Message-ID: <CAMuHMdUui=Ucjo-dxtjkBF2faF4mbvV4EAAT+CyZ_2ix9Nxp+Q@mail.gmail.com> (raw)
In-Reply-To: <355163371.fkynKV0U5x@wasted.cogentembedded.com>
On Tue, Jan 6, 2015 at 11:39 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add the ADSP clock support to the R-Car generation 2 CPG driver. This clock
> gets derived from PLL1. The layout of the ADSPCKCR register is similar to
> those of the clocks supported by the 'clk-div6' driver but the divider encoding
> is non-linear, so can't be supported by that driver...
>
> Based on the original patch by Konstantin Kozhevnikov
> <konstantin.kozhevnikov@cogentembedded.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
prev parent reply other threads:[~2015-01-07 8:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-06 22:39 Sergei Shtylyov
2015-01-07 8:19 ` Geert Uytterhoeven [this message]
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