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AJvYcCXcA8wDGVnHdqJi2GXqeRGJZjnSX3m+o1ARYu1nK5YWo0YvvV5tHQuWRaYONQc12kYVR2Q=@vger.kernel.org X-Gm-Message-State: AOJu0YzP0gKPKrvzkHTTYr8v9V4SjyjwKkRSEkV9VrRSDXOusYa9n8wP fUk/Wiv80MTeq2yz9wV9Ap5DnPXu2KB+KGT26DPDU8Em5/FpByy/HDu3+uF3Z9kazb/sOO9/C0y hAHOlU1dd/rocu6WLkYrgL89CO9lubsk= X-Gm-Gg: ASbGncvTTVBKsphzFokg7PNlSWsi5aZv0d9IqP1Kli/didSZ0UeR+Bir1TaffpOo/ow dqiJhQSUL8KQzaG/FSZ3HN+XOwMH2OkXz4v8UwQ8paKfXk8ykvhJIYgAuAj5PCslJ6lKiAKnWv2 hQxR6pp4pUHYCZ1BzHnCMOjivyQmxrRWRvwLPl+268TnUFBA8Oiqh73cumFqLIXQ== X-Google-Smtp-Source: AGHT+IGbFNXPkYqjZQqn09iVOchn6k5QUdAnNSlPs/XMUCroRdwdeP0hZZnbbuyNPdHKkr8WmeI3Qu5L264jB2MsXOA= X-Received: by 2002:a17:90b:2ecc:b0:311:e5b2:356b with SMTP id 98e67ed59e1d1-313472e9005mr18838455a91.11.1749454855433; Mon, 09 Jun 2025 00:40:55 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250514071803.209166-1-Neeraj.Upadhyay@amd.com> <20250514071803.209166-32-Neeraj.Upadhyay@amd.com> In-Reply-To: <20250514071803.209166-32-Neeraj.Upadhyay@amd.com> From: Tianyu Lan Date: Mon, 9 Jun 2025 15:40:19 +0800 X-Gm-Features: AX0GCFuisu29_xcex8CdM2Yk411ctfB6p7VWrMziyFkU93Q6Yrxgj1z1d3n-g9A Message-ID: Subject: Re: [RFC PATCH v6 31/32] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests To: Neeraj Upadhyay Cc: linux-kernel@vger.kernel.org, bp@alien8.de, tglx@linutronix.de, mingo@redhat.com, dave.hansen@linux.intel.com, Thomas.Lendacky@amd.com, nikunj@amd.com, Santosh.Shukla@amd.com, Vasant.Hegde@amd.com, Suravee.Suthikulpanit@amd.com, David.Kaplan@amd.com, x86@kernel.org, hpa@zytor.com, peterz@infradead.org, seanjc@google.com, pbonzini@redhat.com, kvm@vger.kernel.org, kirill.shutemov@linux.intel.com, huibo.wang@amd.com, naveen.rao@amd.com, francescolavra.fl@gmail.com, tiala@microsoft.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, May 14, 2025 at 3:33=E2=80=AFPM Neeraj Upadhyay wrote: > > The SECURE_AVIC_CONTROL MSR holds the GPA of the guest APIC backing > page and bitfields to control enablement of Secure AVIC and NMI by > guest vCPUs. This MSR is populated by the guest and the hypervisor > should not intercept it. A #VC exception will be generated otherwise. > If this occurs and Secure AVIC is enabled, terminate guest execution. > > Signed-off-by: Neeraj Upadhyay > --- Reviewed-by: Tianyu Lan --=20 Thanks Tianyu Lan