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AFNElJ/jcyN1bQiST2ncIgH9f7oJVTxFdDh9h0vP+YtZW8iiciAOKayL+2zjJYudWdVY6mJ6Z6q0V9QmzERN3qg=@vger.kernel.org X-Gm-Message-State: AOJu0Ywzrd9w9s4Ho9wSH+wukhoNQXE4+Y8LO6bZXJf5ZvFuFG/0oGGL deCClwSA8PML2RR6STl5e6wEah4tnuVAIMAOEbyJlIpyUZwEKSDA1nAxzZLN9MQTTswzx8P89n2 rmY6h1lsGDHaK62B4+DYNwLG/0RQRI5Jale6QPnjyTg== X-Gm-Gg: Acq92OHnSsDoEzr6OLG3Mu8wcJcEHncE8CvU18/vOoQocTiSBTzaIcOQjMLnNHH/xVH cpxsCjjkjz5yE7NygFu/4wZXWPZ62duZP50t3EwIBDzv+INfWdGIx0muxQ+Ae7bCBj4QO8KKLRl mwqOFFXlg+ICCsJTIxchXQgYjw5H9Z/29xO84ruXh87nhDKRRFeke+h7BqZ702/8sNAvHrpjCC/ G6gyEDGDa+gwu/yUr36uXOYoXcGnGrIBDafz9KXQ8yCa0HKetFSnjdxvPKtKqX0LAihqWz33ss0 kwVnt7gdzeXPHPNmb8kTC7x2TYz17vxn22OjnO5aLmZhLzhz7ng+Q3hc90QeR+1NiRm2VA== X-Received: by 2002:a05:6102:2acc:b0:631:7781:fe8a with SMTP id ada2fe7eead31-63a3ef8252dmr962876137.19.1778813377296; Thu, 14 May 2026 19:49:37 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20260328004518.1729186-1-mkhalfella@purestorage.com> <20260328004518.1729186-10-mkhalfella@purestorage.com> <73a9c0e2-ecd0-4170-8723-259529617ec0@suse.de> <20260331165510.GD2861-mkhalfella@purestorage.com> <019cf04f-8988-46fd-aecd-0f77ac5f8b8a@suse.de> <20260407190940.GF2861-mkhalfella@purestorage.com> In-Reply-To: <20260407190940.GF2861-mkhalfella@purestorage.com> From: Randy Jennings Date: Thu, 14 May 2026 19:49:25 -0700 X-Gm-Features: AVHnY4KgRnVMeojU6TJc9W0sK0kdC4KQzgjkeCzgQj7ffI3CHrpfknMybALGGlk Message-ID: Subject: Re: [PATCH v4 09/15] nvme: Implement cross-controller reset completion To: Mohamed Khalfella Cc: Hannes Reinecke , Justin Tee , Naresh Gottumukkala , Paul Ely , Chaitanya Kulkarni , Jens Axboe , Keith Busch , Sagi Grimberg , James Smart , Aaron Dailey , Dhaval Giani , linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Apr 7, 2026 at 12:09=E2=80=AFPM Mohamed Khalfella wrote: > > On Tue 2026-04-07 07:48:50 +0200, Hannes Reinecke wrote: > > On 3/31/26 18:55, Mohamed Khalfella wrote: > > > On Mon 2026-03-30 12:53:07 +0200, Hannes Reinecke wrote: > > >> On 3/28/26 01:43, Mohamed Khalfella wrote: > > >>> An nvme source controller that issues CCR command expects to receiv= e an > > >>> NVME_AER_NOTICE_CCR_COMPLETED when pending CCR succeeds or fails. A= dd > > >>> sctrl->ccr_work to read NVME_LOG_CCR logpage and wakeup any thread > > >>> waiting on CCR completion. > > >>> > > >>> Signed-off-by: Mohamed Khalfella > > >>> --- > > >>> drivers/nvme/host/core.c | 49 ++++++++++++++++++++++++++++++++++= +++++- > > >>> drivers/nvme/host/nvme.h | 1 + > > >>> 2 files changed, 49 insertions(+), 1 deletion(-) > > >>> > > >>> diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c > > >>> index 5603ae36444f..793f203bfc38 100644 > > >>> --- a/drivers/nvme/host/core.c > > >>> +++ b/drivers/nvme/host/core.c > > >>> @@ -1920,7 +1920,8 @@ EXPORT_SYMBOL_GPL(nvme_set_queue_count); > > >>> > > >>> #define NVME_AEN_SUPPORTED \ > > >>> (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ > > >>> - NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) > > >>> + NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_CCR_COMPLETE | \ > > >>> + NVME_AEN_CFG_DISC_CHANGE) > > >>> > > >>> static void nvme_enable_aen(struct nvme_ctrl *ctrl) > > >>> { > > >>> @@ -4873,6 +4874,47 @@ static void nvme_get_fw_slot_info(struct nvm= e_ctrl *ctrl) > > >>> kfree(log); > > >>> } > > >>> > > >>> +static void nvme_ccr_work(struct work_struct *work) > > >>> +{ > > >>> + struct nvme_ctrl *ctrl =3D container_of(work, struct nvme_ctrl, c= cr_work); > > >>> + struct nvme_ccr_entry *ccr; > > >>> + struct nvme_ccr_log_entry *entry; > > >>> + struct nvme_ccr_log *log; > > >>> + unsigned long flags; > > >>> + int ret, i; > > >>> + > > >>> + log =3D kmalloc(sizeof(*log), GFP_KERNEL); > > >>> + if (!log) > > >>> + return; > > >>> + > > >>> + ret =3D nvme_get_log(ctrl, 0, NVME_LOG_CCR, 0x01, > > >>> + 0x00, log, sizeof(*log), 0); > > >>> + if (ret) > > >>> + goto out; > > >>> + > > >>> + spin_lock_irqsave(&ctrl->lock, flags); > > >>> + for (i =3D 0; i < le16_to_cpu(log->ne); i++) { > > >>> + entry =3D &log->entries[i]; > > >>> + if (entry->ccrs =3D=3D NVME_CCR_STATUS_IN_PROGRESS) > > >>> + continue; > > >>> + > > >>> + list_for_each_entry(ccr, &ctrl->ccr_list, list) { > > >>> + struct nvme_ctrl *ictrl =3D ccr->ictrl; > > >>> + > > >>> + if (ictrl->cntlid !=3D le16_to_cpu(entry->icid) |= | > > >>> + ictrl->ciu !=3D entry->ciu) > > >>> + continue; > > >>> + > > >>> + /* Complete matching entry */ > > >>> + ccr->ccrs =3D entry->ccrs; > > >>> + complete(&ccr->complete); > > >>> + } > > >>> + } > > >>> + spin_unlock_irqrestore(&ctrl->lock, flags); > > >>> +out: > > >>> + kfree(log); > > >>> +} > > >>> + > > >>> static void nvme_fw_act_work(struct work_struct *work) > > >>> { > > >>> struct nvme_ctrl *ctrl =3D container_of(work, > > >>> @@ -4949,6 +4991,9 @@ static bool nvme_handle_aen_notice(struct nvm= e_ctrl *ctrl, u32 result) > > >>> case NVME_AER_NOTICE_DISC_CHANGED: > > >>> ctrl->aen_result =3D result; > > >>> break; > > >>> + case NVME_AER_NOTICE_CCR_COMPLETED: > > >>> + queue_work(nvme_wq, &ctrl->ccr_work); > > >>> + break; > > >>> default: > > >>> dev_warn(ctrl->device, "async event result %08x\n= ", result); > > >>> } > > >>> @@ -5144,6 +5189,7 @@ void nvme_stop_ctrl(struct nvme_ctrl *ctrl) > > >>> nvme_stop_failfast_work(ctrl); > > >>> flush_work(&ctrl->async_event_work); > > >>> cancel_work_sync(&ctrl->fw_act_work); > > >>> + cancel_work_sync(&ctrl->ccr_work); > > >>> if (ctrl->ops->stop_ctrl) > > >>> ctrl->ops->stop_ctrl(ctrl); > > >>> } > > >>> @@ -5267,6 +5313,7 @@ int nvme_init_ctrl(struct nvme_ctrl *ctrl, st= ruct device *dev, > > >>> ctrl->quirks =3D quirks; > > >>> ctrl->numa_node =3D NUMA_NO_NODE; > > >>> INIT_WORK(&ctrl->scan_work, nvme_scan_work); > > >>> + INIT_WORK(&ctrl->ccr_work, nvme_ccr_work); > > >>> INIT_WORK(&ctrl->async_event_work, nvme_async_event_work)= ; > > >>> INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); > > >>> INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); > > >>> diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h > > >>> index f2bcff9ccd25..776ee8aa5a93 100644 > > >>> --- a/drivers/nvme/host/nvme.h > > >>> +++ b/drivers/nvme/host/nvme.h > > >>> @@ -419,6 +419,7 @@ struct nvme_ctrl { > > >>> struct nvme_effects_log *effects; > > >>> struct xarray cels; > > >>> struct work_struct scan_work; > > >>> + struct work_struct ccr_work; > > >>> struct work_struct async_event_work; > > >>> struct delayed_work ka_work; > > >>> struct delayed_work failfast_work; > > >> > > >> Hmm. The 'nvme_fence_ctrl' operation introduced in the previous patc= h > > >> is synchronous, yet in this patch we're looking a a log page to figu= re > > >> out if the cross-controller reset is complete. > > >> Which is slightly irritating. > > >> Wouldn't it be better to make the 'nvme_fence_ctrl' operation > > >> asynchronous, and then have a separate function to wait for the fenc= e > > >> operation to complete (which then could look at log pages etc)? > > > > > > True nvme_fence_ctrl() is synchronous, but it runs in from ctrl->fenc= ing_work. > > > What is it that you find irritating about nvme_fence_ctrl()? > > > > > > > Thins is, in order to make nvme_fence_ctrl() synchronous we have to > > wait for the operation itself (which is asynchronous) to complete. > > And that wait in itself is implemented by a wait queue. > > So we're having a wait queue calling nvme_fence_ctrl(), which calls > > another wait queue waiting for a completion. > > And then (if the IRS bit is not set) calling another waitqueue for > > checking the log page. > > There is no point of checking the CCR logpage before getting AEN. Sure > we can implement some sort of polling, but I do not think this is the > right approach. > > > > > I think we could simplify this by simply making nvme_fence_ctrl() > > asynchronous, which could do away with all the workqueue handling. > > I am not sure I understand exactly how nvme_fence_ctrl() can be make > asynchronous. Can you provide example code? I was able to convince Hannes at LSF to withdraw the request for an asynchronous structure for the code. Sincerely, Randy Jennings