From: Nadav Amit <namit@vmware.com>
To: Wanpeng Li <kernellwp@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
LKML <linux-kernel@vger.kernel.org>, kvm <kvm@vger.kernel.org>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: Re: [PATCH v2 2/2] KVM: LAPIC: Don't need to clear IPI delivery status in x2apic mode
Date: Wed, 1 Apr 2020 17:40:03 +0000 [thread overview]
Message-ID: <CE34AD16-64A7-4AA0-9928-507C6F3FF6CD@vmware.com> (raw)
In-Reply-To: <CANRm+CzB3dWatF7qOO_WajXM_ZBn1U6Z8+uq4NxCuLG3TgwY1Q@mail.gmail.com>
> On Mar 31, 2020, at 11:46 PM, Wanpeng Li <kernellwp@gmail.com> wrote:
>
> Cc more people,
> On Wed, 1 Apr 2020 at 08:35, Paolo Bonzini <pbonzini@redhat.com> wrote:
>> On 01/04/20 02:19, Wanpeng Li wrote:
>>> - /* No delay here, so we always clear the pending bit */
>>> - val &= ~(1 << 12);
>>> + /* Immediately clear Delivery Status in xAPIC mode */
>>> + if (!apic_x2apic_mode(apic))
>>> + val &= ~(1 << 12);
>>
>> This adds a conditional, and the old behavior was valid according to the
>> SDM: "software should not assume the value returned by reading the ICR
>> is the last written value".
>
> Nadav, Sean, what do you think?
I do not know. But if you write a KVM unit-test, I can run it on bare-metal
and give you feedback about how it behaves.
next prev parent reply other threads:[~2020-04-01 17:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-01 0:19 [PATCH v2 1/2] KVM: X86: Filter out the broadcast dest for IPI fastpath Wanpeng Li
2020-04-01 0:19 ` [PATCH v2 2/2] KVM: LAPIC: Don't need to clear IPI delivery status in x2apic mode Wanpeng Li
2020-04-01 0:35 ` Paolo Bonzini
2020-04-01 6:46 ` Wanpeng Li
2020-04-01 17:40 ` Nadav Amit [this message]
2020-04-01 23:01 ` Sean Christopherson
2020-04-02 0:14 ` Wanpeng Li
2020-04-01 10:17 ` Wanpeng Li
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