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From: Haakon Bugge <haakon.bugge@oracle.com>
To: Jacob Moroni <jmoroni@google.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>, Leon Romanovsky <leon@kernel.org>,
	Sean Hefty <shefty@nvidia.com>,
	Vlad Dumitrescu <vdumitrescu@nvidia.com>,
	Or Har-Toov <ohartoov@nvidia.com>,
	Manjunath Patil <manjunath.b.patil@oracle.com>,
	OFED mailing list <linux-rdma@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH for-next] RDMA/cm: Rate limit destroy CM ID timeout error message
Date: Thu, 25 Sep 2025 11:29:49 +0000	[thread overview]
Message-ID: <D2E28412-CC9F-497E-BF81-2DB4A8BC1C5E@oracle.com> (raw)
In-Reply-To: <CAHYDg1Rd=meRaF=AJAXJ+5_hDaJckaZs7DJUtXAY_D2z_a6wsw@mail.gmail.com>

Hi Jason and Jake,


> On 16 Sep 2025, at 16:36, Jacob Moroni <jmoroni@google.com> wrote:
> 
> Does this happen when there is a missing send completion?
> 
> Asking because I remember triggering this if a device encounters an
> unrecoverable
> error/VF reset while under heavy RDMA-CM activity (like a large scale
> MPI wire-up).
> 
> I assumed it was because RDMA-CM was waiting for TX completions that
> would never arrive.
> 
> Of course, the unrecoverable error/VF reset without generating flush
> completions was the real
> bug in my case.


I concur. I looked ahead of the first incident, but didn't see any obscure mlx5 driver messages. But looking in-between, I saw:

kernel: mlx5_core 0000:13:01.1 ens4f16: TX timeout detected
kernel: cm_destroy_id_wait_timeout: cm_id=00000000564a7a31 timed out. state 2 -> 0, refcnt=2
kernel: mlx5_core 0000:13:01.1 ens4f16: TX timeout on queue: 12, SQ: 0x14f2a, CQ: 0x1739, SQ Cons: 0x0 SQ Prod: 0x3c5, usecs since last trans: 30224000
kernel: cm_destroy_id_wait_timeout: cm_id=00000000b821dcda timed out. state 2 -> 0, refcnt=1
kernel: cm_destroy_id_wait_timeout: cm_id=00000000edf170fa timed out. state 2 -> 0, refcnt=1
kernel: mlx5_core 0000:13:01.1 ens4f16: EQ 0x14: Cons = 0x444670, irqn = 0x28c

Not in close proximity in time, but a 6 digits amount of messages were suppressed due to the flooding.

My take is that the timeout should be monotonic increasing from the driver to RDMA_CM (and to the ULPs). They are not, as the mlx5e_build_nic_netdev() functions sets the ndetdev's watchdog_timeo to 15 seconds, whereas the timeout value calling cm_destroy_id_wait_timeout() is 10 seconds.

So, the mitigation by detecting a TX timeout from netdev has not kicked in when cm_destroy_id_wait_timeout() is called.


Thxs, Håkon







  reply	other threads:[~2025-09-25 11:30 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-12 10:05 Håkon Bugge
2025-09-12 19:27 ` yanjun.zhu
2025-09-15  7:43 ` Leon Romanovsky
2025-09-15  9:44   ` Haakon Bugge
2025-09-16 14:18 ` Jason Gunthorpe
2025-09-16 14:36   ` Jacob Moroni
2025-09-25 11:29     ` Haakon Bugge [this message]
2025-10-13 14:04       ` Haakon Bugge
2025-10-15 11:38         ` Haakon Bugge
2025-10-15 16:49           ` Jason Gunthorpe
2025-10-15 18:34             ` Sean Hefty
2025-10-15 18:45               ` Jason Gunthorpe
2025-10-16 15:25                 ` Haakon Bugge
2025-10-16 16:12                   ` Jason Gunthorpe
2025-10-16 16:43                     ` Haakon Bugge
2025-10-16 18:01                       ` Jason Gunthorpe
2025-10-21 16:32                         ` Haakon Bugge

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