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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3878251c3a7sm6710697f8f.94.2024.12.13.03.22.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Dec 2024 03:22:53 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 13 Dec 2024 12:22:53 +0100 Message-Id: Cc: <~postmarketos/upstreaming@lists.sr.ht>, , , , , Subject: Re: [PATCH 2/2] media: qcom: camss: Restrict endpoint bus-type to D-PHY From: "Luca Weiss" To: "Vladimir Zapolskiy" , "Bryan O'Donoghue" , "Robert Foss" , "Todor Tomov" , "Mauro Carvalho Chehab" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Barnabas Czeman" , "AngeloGioacchino Del Regno" , "Caleb Connolly" , "David Heidelberg" X-Mailer: aerc 0.18.2-0-ge037c095a049 References: <20241209-camss-dphy-v1-0-5f1b6f25ed92@fairphone.com> <20241209-camss-dphy-v1-2-5f1b6f25ed92@fairphone.com> <9c89e6f4-a9af-4270-b266-537f3464ee32@linaro.org> In-Reply-To: On Fri Dec 13, 2024 at 12:02 PM CET, Vladimir Zapolskiy wrote: > On 12/9/24 14:32, Bryan O'Donoghue wrote: > > On 09/12/2024 12:01, Luca Weiss wrote: > >> Currently the Qualcomm CAMSS driver only supports D-PHY while the > >> hardware on most SoCs also supports C-PHY. Until this support is added= , > >> check for D-PHY to make it somewhat explicit that C-PHY won't work. > >> > >> Signed-off-by: Luca Weiss > >> --- > >> drivers/media/platform/qcom/camss/camss.c | 9 +++++++++ > >> 1 file changed, 9 insertions(+) > >> > >> diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media= /platform/qcom/camss/camss.c > >> index 9fb31f4c18adee886cd0bcf84438a8f27635e07f..b99af35074cdf6fa794a0d= 2f0d54ecf12ac354d9 100644 > >> --- a/drivers/media/platform/qcom/camss/camss.c > >> +++ b/drivers/media/platform/qcom/camss/camss.c > >> @@ -1855,6 +1855,15 @@ static int camss_of_parse_endpoint_node(struct = device *dev, > >> if (ret) > >> return ret; > >> =20 > >> + /* > >> + * Most SoCs support both D-PHY and C-PHY standards, but currently o= nly > >> + * D-PHY is supported in the driver. > >> + */ > >> + if (vep.bus_type !=3D V4L2_MBUS_CSI2_DPHY) { > >> + dev_err(dev, "Unsupported bus type %d\n", vep.bus_type); > >> + return -EINVAL; > >> + } > >> + > > Looks like it would break all old board dtbs, which is not just bad, but = NAK. > > V4L2_MBUS_UNKNOWN shall be properly handled without the risk of regressio= ns. Please see drivers/media/v4l2-core/v4l2-fwnode.c around line 218. The code there sets bus_type if it's UNKNOWN if (bus_type =3D=3D V4L2_MBUS_UNKNOWN) vep->bus_type =3D V4L2_MBUS_CSI2_DPHY; So setting "bus-type" in dt is not necessary, even if it makes things more explicit from dt side. I don't think we'll ever get UNKNOWN here in camss. Regards Luca > > >> csd->interface.csiphy_id =3D vep.base.port; > >> =20 > >> mipi_csi2 =3D &vep.bus.mipi_csi2; > >> > >=20 > > Reviewed-by: Bryan O'Donoghue > >=20 > > -- > Best wishes, > Vladimir