From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751971AbcG2EPW (ORCPT ); Fri, 29 Jul 2016 00:15:22 -0400 Received: from mga14.intel.com ([192.55.52.115]:37167 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750839AbcG2EPT convert rfc822-to-8bit (ORCPT ); Fri, 29 Jul 2016 00:15:19 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,437,1464678000"; d="scan'208";a="1004659155" From: "Odzioba, Lukasz" To: "linux-kernel@vger.kernel.org" , "linux-edac@vger.kernel.org" , "bp@alien8.de" , "dougthompson@xmission.com" , "mchehab@kernel.org" CC: "Luck, Tony" , "Chrzaniuk, Hubert" , "Anaczkowski, Lukasz" Subject: RE: [PATCH 1/1] EDAC, sb_edac: Fix channel reporting on Knights Landing Thread-Topic: [PATCH 1/1] EDAC, sb_edac: Fix channel reporting on Knights Landing Thread-Index: AQHR5HMmdPzrqIkpBkG5FsOB09Kql6Au1a5g Date: Fri, 29 Jul 2016 04:15:15 +0000 Message-ID: References: <1469231089-22837-1-git-send-email-lukasz.odzioba@intel.com> In-Reply-To: <1469231089-22837-1-git-send-email-lukasz.odzioba@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNDNkZjNmYjYtMGMyMS00NDFhLTg3YWEtNmU0ZGQwOThiY2FjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IjlqcFwvSEhMVnJkUzNzb1NqaE81Q2EzXC9HZW1NZGdlK01Zd0V6ck40SU51RT0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Saturday, July 23, 2016 1:45 AM, Lukasz Odzioba wrote: > On Intel Xeon Phi Knights Landing processor family the channels > of memory controller have untypical arrangement - MC0 is mapped to > CH3,4,5 and MC1 is mapped to CH0,1,2. This causes EDAC driver to > report the channel name incorrectly. > > We missed this change earlier, so the code already contains > similar comment, but the translation function is incorrect. > > Without this patch: > errors in DIMM_A and DIMM_D were reported in DIMM_D > errors in DIMM_B and DIMM_E were reported in DIMM_E > errors in DIMM_C and DIMM_F were reported in DIMM_F > > Fixes: d0cdf9003140 ("sb_edac: Add Knights Landing (Xeon Phi gen 2) support") Hi, I would greatly appreciate it if you kindly give me some feedback on this patch. Thanks, Lukas