From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f44.google.com (mail-wr1-f44.google.com [209.85.221.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8765F2054FA for ; Tue, 4 Feb 2025 10:10:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.44 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738663802; cv=none; b=GQNI2Rx+T23TdpNNQ47u/hycCnIkccOSztdmAQBhutNKW78C1g1USCcRbt+dFPd6CLSl4BfhCFOs//ANGaNRpbwmOQ3vuuUfOi2EgG5h7R5w13E16LNbrGRXPtr/8Hxyf+CnSqFsnmynqBSt6Cl+1Yzzd4jsuaZeMv1D0w+lUx4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738663802; c=relaxed/simple; bh=pBDQPSE9tXQoqKm+B6E6lo+ThoVCELM++WW2Zjoplh8=; h=Mime-Version:Content-Type:Date:Message-Id:Cc:Subject:From:To: References:In-Reply-To; b=NWWc06kUbEQ9AmTxQTVS6sP9vr0o3Vo5dNRCLZ8GNSaSaTu7SGsQCeN4BemGUWai1cnYNFjn3IamjgCQ5Xv2mH0UKY2ZHzjlKD9weWcgqhP6g3H2/+fQcIAvx5u4WItROhem7utmFE8knKSLdgySkjDOkZsJg7M4B2Rs2Rt7+P4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com; spf=pass smtp.mailfrom=fairphone.com; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b=ifkINHUh; arc=none smtp.client-ip=209.85.221.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=fairphone.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fairphone.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b="ifkINHUh" Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-385e27c75f4so4454786f8f.2 for ; Tue, 04 Feb 2025 02:10:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1738663799; x=1739268599; darn=vger.kernel.org; h=in-reply-to:references:to:from:subject:cc:message-id:date :content-transfer-encoding:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=OCPScdOIofnuxRD1Nb8R9yFru3nVgqy06Tlym+YD8X8=; b=ifkINHUhW8YOeJpNaK6qlIbpegfbQNkepDUfTRjXOf7cVSzu26fQaQBYYo27iyaeqe D5TGP32MpdA4BsDx7YztHAps6X2ZQbtjXPDBBeQoNeOc+IkONXrPC1Xqrxw5AV/BYmyh 91rAnE8RluDQSP/joyAutd/P4J22S1RkmegH4nwJPvFDqUWXEMdLA0PCHDx37MkQAI27 ajcB+/MgqVjWZDa1/kvVK+NALezmd9SAZ/lljsXJS0fg9doTjfpVvMriGuNJSZILuhN+ 724JAGKupb1onicNskFfPUKAXFoQQAzBXfzrvhEHMq+nKGyN5dvAgfxeqpjuTSKZ2eZy URnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738663799; x=1739268599; h=in-reply-to:references:to:from:subject:cc:message-id:date :content-transfer-encoding:mime-version:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=OCPScdOIofnuxRD1Nb8R9yFru3nVgqy06Tlym+YD8X8=; b=wp6pxKvsfijZaDvA+Ntc+Rf9ZSkCBaWafKt/bvlvpT8q6/s3pc+IsPddnTnhAaZ+xy 8H7K0DSMVE+uM/f+k38HOwWPCuhXhUc0g7D6PmLHkNh8mUIHfVlkr5eDBe6D/ojQ650U mHY/coR9Ii5DzphhaErwKgcA62iD7Zs/gVLqdBgP6ZOc9A3zAhROVNBO56TTjqxFlRTk R6njAoHneDF/FM/JXiiN/bW+ChPWbYYrGQgZaheCSq7kBKaRH2IyBDTko2HcC+z307NF R+mSBm9aTMMzTtSYUxKkiUzOqt+NnUdo3aKcFtAoKvkZtBKORvY6MWE8bzts0eaj2Uo2 zCog== X-Forwarded-Encrypted: i=1; AJvYcCUXJm82HiU/cmXGFJjy3mYsi7x7ZPWStW77KKk0OlKDD47WSkRYcR8fQ6DP7lra+iKWqY1gkzlG7KEWlyE=@vger.kernel.org X-Gm-Message-State: AOJu0YxJyJIA5C8qBtYR7zh09XDQ2qN4ktF98H7TRivk09mWzNQSp8WZ bk66CrsvTMcbIcj3O8KYPf87LHgzJexcNeB8D+RvRJQkAaWRfivvCKhn/s9dxEw= X-Gm-Gg: ASbGncs42Dds3jPeaJnX7nDvBD8ZbF0oHoOjYmp60z/S76kbYvw7USTnNOxQ0uA0r1u WsyJLtHq4xAYF8V1G1pBCHKkLKCIEBO8nS+DBmrBEZclbhok+OtGxzkwvbKAk7Btm+i/DLt3XGb N2KbYsOFNGHKH/8fNOCHeK3It7CNzNi8c7zNdJuHO5Dz60t6EmtMnrgB4cb6yv/Oj6jyjFs7EpD zGFMv5kn2CAFgNr6zwkgnoHN5BHKR7RE5Zag/Xn14WD/oHnOM1iSlTRD+PoUezrDir1cMnLIhVZ c9Ow122ifMR/Ha6BD3d1RCo= X-Google-Smtp-Source: AGHT+IH9ELbzMRvX0qUmTPFuiDE5EWroyjCa7whMru5exnpe511SFcsg4pSld7R/Y+EzddPEaf717g== X-Received: by 2002:adf:fbd1:0:b0:386:3835:9fec with SMTP id ffacd0b85a97d-38c520972d6mr17054643f8f.44.1738663798783; Tue, 04 Feb 2025 02:09:58 -0800 (PST) Received: from localhost ([2a02:a03f:6bc3:6b01:62c7:350e:556e:d0f0]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c5c1cf571sm15077251f8f.82.2025.02.04.02.09.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Feb 2025 02:09:58 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 04 Feb 2025 11:09:58 +0100 Message-Id: Cc: , , , , , , , , , <~postmarketos/upstreaming@lists.sr.ht> Subject: Re: [PATCH] ASoC: qcom: sc8280xp: enable primary mi2s From: "Luca Weiss" To: , "Danila Tikhonov" X-Mailer: aerc 0.19.0-0-gadd9e15e475d References: <20250203113857.34728-1-danila@jiaxyga.com> <842284b1-343f-4991-98f4-462f547ad2bc@linaro.org> <7ac9b23a-6138-46ad-8af8-fe283b765565@linaro.org> In-Reply-To: <7ac9b23a-6138-46ad-8af8-fe283b765565@linaro.org> On Tue Feb 4, 2025 at 11:08 AM CET, neil.armstrong wrote: > On 04/02/2025 11:04, Luca Weiss wrote: >> On Tue Feb 4, 2025 at 9:19 AM CET, neil.armstrong wrote: >>> On 04/02/2025 00:27, Luca Weiss wrote: >>>> On Mon Feb 3, 2025 at 5:33 PM CET, Danila Tikhonov wrote: >>>>> On 03/02/2025 17:23, neil.armstrong@linaro.org wrote: >>>>>> On 03/02/2025 12:38, Danila Tikhonov wrote: >>>>>>> When using primary mi2s on sc8280xp-compatible SoCs, the correct cl= ock >>>>>>> needs to get enabled to be able to use the mi2s interface. >>>>>>> >>>>>>> Signed-off-by: Danila Tikhonov >>>>>>> --- >>>>>>> =C2=A0 sound/soc/qcom/sc8280xp.c | 13 +++++++++++++ >>>>>>> =C2=A0 1 file changed, 13 insertions(+) >>>>>>> >>>>>>> diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c >>>>>>> index 311377317176..03687de1ebb0 100644 >>>>>>> --- a/sound/soc/qcom/sc8280xp.c >>>>>>> +++ b/sound/soc/qcom/sc8280xp.c >>>>>>> @@ -14,6 +14,8 @@ >>>>>>> =C2=A0 #include "common.h" >>>>>>> =C2=A0 #include "sdw.h" >>>>>>> =C2=A0 +#define MI2S_BCLK_RATE=C2=A0=C2=A0=C2=A0 1536000 >>>>>>> + >>>>>>> =C2=A0 struct sc8280xp_snd_data { >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool stream_prepared[AFE_PORT_MAX]= ; >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct snd_soc_card *card; >>>>>>> @@ -25,13 +27,24 @@ struct sc8280xp_snd_data { >>>>>>> =C2=A0 =C2=A0 static int sc8280xp_snd_init(struct snd_soc_pcm_run= time *rtd) >>>>>>> =C2=A0 { >>>>>>> +=C2=A0=C2=A0=C2=A0 unsigned int codec_dai_fmt =3D SND_SOC_DAIFMT_B= C_FC; >>>>>>> +=C2=A0=C2=A0=C2=A0 unsigned int fmt =3D SND_SOC_DAIFMT_BP_FP; >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct sc8280xp_snd_data *data =3D >>>>>>> snd_soc_card_get_drvdata(rtd->card); >>>>>>> +=C2=A0=C2=A0=C2=A0 struct snd_soc_dai *codec_dai =3D snd_soc_rtd_t= o_codec(rtd, 0); >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct snd_soc_dai *cpu_dai =3D sn= d_soc_rtd_to_cpu(rtd, 0); >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct snd_soc_card *card =3D rtd-= >card; >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct snd_soc_jack *dp_jack=C2=A0= =3D NULL; >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int dp_pcm_id =3D 0; >>>>>>> =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 switch (cpu_dai->id) { >>>>>>> +=C2=A0=C2=A0=C2=A0 case PRIMARY_MI2S_RX: >>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 codec_dai_fmt |=3D SND_= SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S; >>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 snd_soc_dai_set_sysclk(= cpu_dai, >>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT, >>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK); >>>>>> >>>>>> How is this possible ? sc8280xp uses the q6prm clock driver, and >>>>>> there's no >>>>>> way this call sets the Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT, or I totall= y >>>>>> missed >>>>>> something. >>>>>> >>>>>> And prm is neither a dai nor has the set_sysclk callback. >>>>>> >>>>>> Neil >>>>>> >>>>> Oh, thanks for the answer. >>>>> >>>>> This comes from qcm6490 compatibility. Actually it is needed for >>>>> Nothing Phone (1) and Luca Weiss just suggested me to use >>>>> qcom,qcm6490-idp-sndcard like do they do it for FP5. (SM7325 is the >>>>> closest to QCM6490): >>>>> https://github.com/sc7280-mainline/linux/pull/5#discussion_r184898478= 8 >>>>> Actually I also think it is a bit incorrect. >>>> >>>> For reference, this is coming from this and following: >>>> https://lore.kernel.org/linux-arm-msm/e8a24709-de96-4d09-ba00-1e084a65= 6c68@kernel.org/ >>> >>> Sure, but do you use sound/soc/qcom/sc8280xp.c ? it's designed for audi= oreach >>> compatible audio architecture (post sm8250). >>=20 >> I would've also thought qcm6490-idp and qcm6490-rb3gen2 are >> pre-audioreach, so sm8250.c would be a better match - but these two >> devices already use sc8280xp.c driver for some reason? > > I think they were added to sc8280xp.c because it has the logic to change > the card name and some other tweaks for record channels setup, > but it can be easily added to sm8250.c. This is probably a better idea then... > > Neil > >>=20 >> Maybe someone with more insight on these devices can help clarify this? >> I'll also need this for qcm6490-fairphone-fp5 soon. >>=20 >> Regards Luca >>=20 >>> >>> sound/soc/qcom/sm8250.c has already support for PRIMARY_MI2S_RX via >>> the Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT, and it compatible with the previo= us >>> audio architecture (non audioreach). >>> >>> Neil >>> >>>> >>>> Regards >>>> Luca >>>> >>>>> >>>>> --- >>>>> Regards, >>>>> Danila >>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 snd_soc_dai_set_fmt(cpu= _dai, fmt); >>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 snd_soc_dai_set_fmt(cod= ec_dai, codec_dai_fmt); >>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 break; >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case WSA_CODEC_DMA_RX_0: >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case WSA_CODEC_DMA_RX_1: >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* >>>>>> >>>> >>=20