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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e8169b0232sm6033780a12.38.2025.03.17.05.12.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Mar 2025 05:12:34 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 17 Mar 2025 13:12:33 +0100 Message-Id: From: "Luca Weiss" To: "Konrad Dybcio" , "Bjorn Andersson" , "Konrad Dybcio" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" Cc: <~postmarketos/upstreaming@lists.sr.ht>, , "Krzysztof Kozlowski" , , , Subject: Re: [PATCH 2/3] arm64: dts: qcom: sm6350: Add OPP table support to UFSHC X-Mailer: aerc 0.20.1-0-g2ecb8770224a References: <20250314-sm6350-ufs-things-v1-0-3600362cc52c@fairphone.com> <20250314-sm6350-ufs-things-v1-2-3600362cc52c@fairphone.com> In-Reply-To: Hi Konrad, On Fri Mar 14, 2025 at 11:08 PM CET, Konrad Dybcio wrote: > On 3/14/25 10:17 AM, Luca Weiss wrote: >> UFS host controller, when scaling gears, should choose appropriate >> performance state of RPMh power domain controller along with clock >> frequency. So let's add the OPP table support to specify both clock >> frequency and RPMh performance states replacing the old "freq-table-hz" >> property. >>=20 >> Signed-off-by: Luca Weiss >> --- > > [...] > >> + >> + ufs_opp_table: opp-table { >> + compatible =3D "operating-points-v2"; >> + >> + opp-50000000 { >> + opp-hz =3D /bits/ 64 <50000000>, >> + /bits/ 64 <0>, >> + /bits/ 64 <0>, >> + /bits/ 64 <37500000>, > > This rate on this clk requires opp_svs (not low_svs) Not sure where you're seeing this? This is from my msm-4.19 tree: gcc_ufs_phy_axi_clk_src: .rate_max =3D (unsigned long[VDD_NUM]) { [VDD_LOWER] =3D 50000000, gcc_ufs_phy_unipro_core_clk_src: .rate_max =3D (unsigned long[VDD_NUM]) { [VDD_LOWER] =3D 37500000, gcc_ufs_phy_ice_core_clk_src: .rate_max =3D (unsigned long[VDD_NUM]) { [VDD_LOWER] =3D 75000000, [VDD_LOWER] =3D RPMH_REGULATOR_LEVEL_LOW_SVS, My intepretation for this is we need low_svs? Regards Luca > > with that: > > Reviewed-by: Konrad Dybcio > > Konrad