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Sun, 7 Feb 2021 16:45:05 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 222DCAE04D; Sun, 7 Feb 2021 16:45:03 +0000 (GMT) Received: from [9.79.226.154] (unknown [9.79.226.154]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Sun, 7 Feb 2021 16:45:02 +0000 (GMT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 13.4 \(3608.120.23.2.4\)) Subject: Re: [PATCH 6/9] perf report: Support instruction latency From: Athira Rajeev In-Reply-To: <2f2ede9e-b098-4921-59e2-1289bdc87ba1@linux.intel.com> Date: Sun, 7 Feb 2021 22:15:00 +0530 Cc: Arnaldo Carvalho de Melo , mingo@kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , eranian@google.com, namhyung@kernel.org, jolsa@redhat.com, ak@linux.intel.com, yao.jin@linux.intel.com, maddy@linux.vnet.ibm.com Content-Transfer-Encoding: quoted-printable Message-Id: References: <1612296553-21962-1-git-send-email-kan.liang@linux.intel.com> <1612296553-21962-7-git-send-email-kan.liang@linux.intel.com> <27633871-eda5-7faa-8783-84dd49f8a6cd@linux.intel.com> <6F377E9D-89F8-414F-A2CC-C96797697159@linux.vnet.ibm.com> <2f2ede9e-b098-4921-59e2-1289bdc87ba1@linux.intel.com> To: "Liang, Kan" X-Mailer: Apple Mail (2.3608.120.23.2.4) X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.737 definitions=2021-02-07_08:2021-02-05,2021-02-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 adultscore=0 impostorscore=0 mlxscore=0 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2102070117 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On 05-Feb-2021, at 8:21 PM, Liang, Kan = wrote: >=20 >=20 >=20 > On 2/5/2021 7:55 AM, Athira Rajeev wrote: >>>> Because in other archs, the var2_w of =E2=80=98perf_sample_weight=E2=80= =99 could be used to capture something else than the Local INSTR = Latency. >>>> Can we have some weak function to populate the header string ? >>> I agree that the var2_w has different meanings among architectures. = We should not force it to data->ins_lat. >>>=20 >>> The patch as below should fix it. Does it work for you? >> My point about weak function was actually for the arch specific = header string. But I guess we should not force it to data->ins_lat >=20 > Yes, I don't think PowerPC should force var2_w to data->ins_lat. I = think you can create your own field. >=20 >> as you mentioned. I checked the below patch defining an = =E2=80=98arch_perf_parse_sample_weight' for powerpc and it works. >> But one observation is that, for cases with kernel having support for = PERF_SAMPLE_WEIGHT_STRUCT but missing arch specific support for = =E2=80=98arch_perf_parse_sample_weight', it will report =E2=80=98Local = Weight=E2=80=99 wrongly since weak function takes it as 64 bit. Not sure = if that is a valid case to consider though. >=20 > Currently, the PERF_SAMPLE_WEIGHT_STRUCT is only enabled on X86 by = default. > = https://lore.kernel.org/lkml/1612296553-21962-6-git-send-email-kan.liang@l= inux.intel.com/ >=20 > For PowerPC, the PERF_SAMPLE_WEIGHT is still the default setting. = There is no way to set PERF_SAMPLE_WEIGHT_STRUCT via perf tool. > I don't think the above case will happen. Yes.=20 I tested with kernel changes from perf/core branch of = git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git And perf tools side changes from tmp.perf/core branch of = git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git along with = the above change.=20 The default setting for powerpc works with out breaking anything and = verified using =E2=80=9Cperf mem record =E2=80=9D Tested-by: Athira Rajeev Thanks Athira Rajeev >=20 > Thanks, > Kan