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From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Lyude Paul" <lyude@redhat.com>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <benno.lossin@proton.me>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>
Cc: "John Hubbard" <jhubbard@nvidia.com>,
	"Ben Skeggs" <bskeggs@nvidia.com>,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"Timur Tabi" <ttabi@nvidia.com>,
	"Alistair Popple" <apopple@nvidia.com>,
	<linux-kernel@vger.kernel.org>, <rust-for-linux@vger.kernel.org>,
	<nouveau@lists.freedesktop.org>,
	<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v4 17/20] gpu: nova-core: compute layout of the FRTS region
Date: Wed, 04 Jun 2025 13:18:37 +0900	[thread overview]
Message-ID: <DADGJZGG5PXE.170H96D26HIN6@nvidia.com> (raw)
In-Reply-To: <632966ba8231e8f3c20350b217b225301280cdd3.camel@redhat.com>

On Wed Jun 4, 2025 at 6:14 AM JST, Lyude Paul wrote:
> On Wed, 2025-05-21 at 15:45 +0900, Alexandre Courbot wrote:
>> FWSEC-FRTS is run with the desired address of the FRTS region as
>> parameter, which we need to compute depending on some hardware
>> parameters.
>> 
>> Do this in a `FbLayout` structure, that will be later extended to
>> describe more memory regions used to boot the GSP.
>> 
>> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
>> ---
>>  drivers/gpu/nova-core/gpu.rs              |  4 ++
>>  drivers/gpu/nova-core/gsp.rs              |  3 ++
>>  drivers/gpu/nova-core/gsp/fb.rs           | 77 +++++++++++++++++++++++++++++++
>>  drivers/gpu/nova-core/gsp/fb/hal.rs       | 30 ++++++++++++
>>  drivers/gpu/nova-core/gsp/fb/hal/ga100.rs | 24 ++++++++++
>>  drivers/gpu/nova-core/gsp/fb/hal/ga102.rs | 24 ++++++++++
>>  drivers/gpu/nova-core/gsp/fb/hal/tu102.rs | 28 +++++++++++
>>  drivers/gpu/nova-core/nova_core.rs        |  1 +
>>  drivers/gpu/nova-core/regs.rs             | 76 ++++++++++++++++++++++++++++++
>>  9 files changed, 267 insertions(+)
>> 
>> diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
>> index 39b1cd3eaf8dcf95900eb93d43cfb4f085c897f0..7e03a5696011d12814995928b2984cceae6b6756 100644
>> --- a/drivers/gpu/nova-core/gpu.rs
>> +++ b/drivers/gpu/nova-core/gpu.rs
>> @@ -7,6 +7,7 @@
>>  use crate::falcon::{gsp::Gsp, sec2::Sec2, Falcon};
>>  use crate::firmware::{Firmware, FIRMWARE_VERSION};
>>  use crate::gfw;
>> +use crate::gsp::fb::FbLayout;
>>  use crate::regs;
>>  use crate::util;
>>  use crate::vbios::Vbios;
>> @@ -239,6 +240,9 @@ pub(crate) fn new(
>>  
>>          let _sec2_falcon = Falcon::<Sec2>::new(pdev.as_ref(), spec.chipset, bar, true)?;
>>  
>> +        let fb_layout = FbLayout::new(spec.chipset, bar)?;
>> +        dev_dbg!(pdev.as_ref(), "{:#x?}\n", fb_layout);
>> +
>>          // Will be used in a later patch when fwsec firmware is needed.
>>          let _bios = Vbios::new(pdev, bar)?;
>>  
>> diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..27616a9d2b7069b18661fc97811fa1cac285b8f8
>> --- /dev/null
>> +++ b/drivers/gpu/nova-core/gsp.rs
>> @@ -0,0 +1,3 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +pub(crate) mod fb;
>> diff --git a/drivers/gpu/nova-core/gsp/fb.rs b/drivers/gpu/nova-core/gsp/fb.rs
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..e65f2619b4c03c4fa51bb24f3d60e8e7008e6ca5
>> --- /dev/null
>> +++ b/drivers/gpu/nova-core/gsp/fb.rs
>> @@ -0,0 +1,77 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +use core::ops::Range;
>> +
>> +use kernel::num::NumExt;
>> +use kernel::prelude::*;
>> +
>> +use crate::driver::Bar0;
>> +use crate::gpu::Chipset;
>> +use crate::regs;
>> +
>> +mod hal;
>> +
>> +/// Layout of the GPU framebuffer memory.
>> +///
>> +/// Contains ranges of GPU memory reserved for a given purpose during the GSP bootup process.
>> +#[derive(Debug)]
>> +#[expect(dead_code)]
>> +pub(crate) struct FbLayout {
>> +    pub fb: Range<u64>,
>> +    pub vga_workspace: Range<u64>,
>> +    pub frts: Range<u64>,
>> +}
>> +
>> +impl FbLayout {
>> +    /// Computes the FB layout.
>> +    pub(crate) fn new(chipset: Chipset, bar: &Bar0) -> Result<Self> {
>> +        let hal = chipset.get_fb_fal();
>> +
>> +        let fb = {
>> +            let fb_size = hal.vidmem_size(bar);
>> +
>> +            0..fb_size
>> +        };
>> +
>> +        let vga_workspace = {
>> +            let vga_base = {
>> +                const NV_PRAMIN_SIZE: u64 = 0x100000;
>
> Don't leave those size constants out, they're getting lonely :C

Not quite sure where I should put these; they are not used (for now)
anywhere else, so the relevant scope is not obvious to me. Any
suggestion?

>
>> +                let base = fb.end - NV_PRAMIN_SIZE;
>> +
>> +                if hal.supports_display(bar) {
>> +                    match regs::NV_PDISP_VGA_WORKSPACE_BASE::read(bar).vga_workspace_addr() {
>
> Considering how long register names are by default, I wonder if we should just
> be doing:
>
> `use crate::regs::*`
>
> Instead, since the NV_* makes it pretty unambiguous already.

We could - I'm just a bit wary of introducing lots of (unrelated)
register names into the file's namespace... Maybe we should split
`regs.rs` into smaller sub-modules, e.g. `pdisp`, `pfb`, `pfalcon`, etc?

>
>> +                        Some(addr) => {
>> +                            if addr < base {
>> +                                const VBIOS_WORKSPACE_SIZE: u64 = 0x20000;
>> +
>> +                                // Point workspace address to end of framebuffer.
>> +                                fb.end - VBIOS_WORKSPACE_SIZE
>> +                            } else {
>> +                                addr
>> +                            }
>> +                        }
>> +                        None => base,
>> +                    }
>> +                } else {
>> +                    base
>> +                }
>> +            };
>> +
>> +            vga_base..fb.end
>> +        };
>> +
>> +        let frts = {
>> +            const FRTS_DOWN_ALIGN: u64 = 0x20000;
>> +            const FRTS_SIZE: u64 = 0x100000;
>> +            let frts_base = vga_workspace.start.align_down(FRTS_DOWN_ALIGN) - FRTS_SIZE;
>> +
>> +            frts_base..frts_base + FRTS_SIZE
>> +        };
>> +
>> +        Ok(Self {
>> +            fb,
>> +            vga_workspace,
>> +            frts,
>> +        })
>> +    }
>> +}
>> diff --git a/drivers/gpu/nova-core/gsp/fb/hal.rs b/drivers/gpu/nova-core/gsp/fb/hal.rs
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..9f8e777e90527026a39061166c6af6257a066aca
>> --- /dev/null
>> +++ b/drivers/gpu/nova-core/gsp/fb/hal.rs
>> @@ -0,0 +1,30 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +use crate::driver::Bar0;
>> +use crate::gpu::Chipset;
>> +
>> +mod ga100;
>> +mod ga102;
>> +mod tu102;
>> +
>> +pub(crate) trait FbHal {
>> +    /// Returns `true` is display is supported.
>> +    fn supports_display(&self, bar: &Bar0) -> bool;
>> +    /// Returns the VRAM size, in bytes.
>> +    fn vidmem_size(&self, bar: &Bar0) -> u64;
>> +}
>> +
>> +impl Chipset {
>> +    /// Returns the HAL corresponding to this chipset.
>> +    pub(super) fn get_fb_fal(self) -> &'static dyn FbHal {
>> +        use Chipset::*;
>> +
>> +        match self {
>> +            TU102 | TU104 | TU106 | TU117 | TU116 => tu102::TU102_HAL,
>> +            GA100 => ga100::GA100_HAL,
>> +            GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 => {
>
> Hopefully I'm not hallucinating us adding #[derive(Ordering)] or whatever it's
> called now that I'm 17 patches deep but, couldn't we use ranges here w/r/t to
> the model numbers?

I wish we could, but Rust doesn't allow this yet:

    error[E0029]: only `char` and numeric types are allowed in range patterns
      --> drivers/gpu/nova-core/gsp/fb/hal.rs:23:13
      |
    23 |             TU102..TU116 => tu102::TU102_HAL,
      |             -----^^-----
      |             |      |
      |             |      this is of type `Chipset` but it should be `char` or numeric
      |             this is of type `Chipset` but it should be `char` or numeric

Applying `#[repr(u32)]` on `Chipset` does not enable ranges unfortunately.

>
> Otherwise:
>
> Reviewed-by: Lyude Paul <lyude@redhat.com>

Thank you!


  reply	other threads:[~2025-06-04  4:18 UTC|newest]

Thread overview: 109+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-21  6:44 [PATCH v4 00/20] nova-core: run FWSEC-FRTS to perform first stage of GSP initialization Alexandre Courbot
2025-05-21  6:44 ` [PATCH v4 01/20] rust: dma: expose the count and size of CoherentAllocation Alexandre Courbot
2025-05-21  8:00   ` Danilo Krummrich
2025-05-22  5:24     ` Alexandre Courbot
2025-05-21 12:43   ` Boqun Feng
2025-05-21 15:57     ` Joel Fernandes
2025-05-21 15:59       ` Joel Fernandes
2025-05-22  5:29     ` Alexandre Courbot
2025-06-02  9:24       ` Danilo Krummrich
2025-05-21  6:44 ` [PATCH v4 02/20] rust: make ETIMEDOUT error available Alexandre Courbot
2025-05-21  7:27   ` Benno Lossin
2025-05-21  6:44 ` [PATCH v4 03/20] rust: sizes: add constants up to SZ_2G Alexandre Courbot
2025-05-21 12:45   ` Boqun Feng
2025-05-21  6:44 ` [PATCH v4 04/20] rust: add new `num` module with useful integer operations Alexandre Courbot
2025-05-22  4:00   ` Alexandre Courbot
2025-05-22  8:44     ` Miguel Ojeda
2025-05-22  9:31       ` Alexandre Courbot
2025-05-28 19:56   ` Alice Ryhl
2025-05-29  1:35     ` Alexandre Courbot
2025-05-28 20:17   ` Benno Lossin
2025-05-29  1:18     ` Alexandre Courbot
2025-05-29  7:27       ` Benno Lossin
2025-06-02  9:39         ` Danilo Krummrich
2025-06-03 22:53           ` Benno Lossin
2025-06-03 23:54             ` Alexandre Courbot
2025-06-04  7:21               ` Benno Lossin
2025-06-02 13:09         ` Alexandre Courbot
2025-06-03 23:02           ` Benno Lossin
2025-06-04  0:05             ` Alexandre Courbot
2025-06-04  7:18               ` Benno Lossin
2025-06-12 13:17                 ` Alexandre Courbot
2025-06-12 13:27                   ` Alexandre Courbot
2025-06-12 14:49                     ` Benno Lossin
2025-06-13  5:31                       ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 05/20] gpu: nova-core: use absolute paths in register!() macro Alexandre Courbot
2025-05-30 21:38   ` Lyude Paul
2025-05-21  6:45 ` [PATCH v4 06/20] gpu: nova-core: add delimiter for helper rules " Alexandre Courbot
2025-05-30 21:39   ` Lyude Paul
2025-05-21  6:45 ` [PATCH v4 07/20] gpu: nova-core: expose the offset of each register as a type constant Alexandre Courbot
2025-05-30 21:40   ` Lyude Paul
2025-05-21  6:45 ` [PATCH v4 08/20] gpu: nova-core: allow register aliases Alexandre Courbot
2025-05-21  8:37   ` Danilo Krummrich
2025-05-22  5:14     ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 09/20] gpu: nova-core: increase BAR0 size to 16MB Alexandre Courbot
2025-05-30 21:46   ` Lyude Paul
2025-06-02 11:21     ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 10/20] gpu: nova-core: add helper function to wait on condition Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 11/20] gpu: nova-core: wait for GFW_BOOT completion Alexandre Courbot
2025-05-30 21:51   ` Lyude Paul
2025-05-31 14:09     ` Miguel Ojeda
2025-05-31 14:37       ` Danilo Krummrich
2025-05-31 14:45         ` Miguel Ojeda
2025-06-02 11:21         ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 12/20] gpu: nova-core: add DMA object struct Alexandre Courbot
2025-05-30 21:53   ` Lyude Paul
2025-05-21  6:45 ` [PATCH v4 13/20] gpu: nova-core: register sysmem flush page Alexandre Courbot
2025-05-30 21:57   ` Lyude Paul
2025-06-02 11:09     ` Danilo Krummrich
2025-06-02 11:20       ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 14/20] gpu: nova-core: add falcon register definitions and base code Alexandre Courbot
2025-05-30 22:22   ` Lyude Paul
2025-06-03  8:03     ` Alexandre Courbot
2025-06-02 12:06   ` Danilo Krummrich
2025-06-03  7:59     ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 15/20] gpu: nova-core: firmware: add ucode descriptor used by FWSEC-FRTS Alexandre Courbot
2025-05-30 22:23   ` Lyude Paul
2025-06-02 12:26   ` Danilo Krummrich
2025-06-04  3:58     ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 16/20] nova-core: Add support for VBIOS ucode extraction for boot Alexandre Courbot
2025-05-27 20:38   ` Joel Fernandes
2025-05-29  6:47     ` Alexandre Courbot
2025-06-03 21:15     ` Lyude Paul
2025-06-05 16:18       ` Joel Fernandes
2025-06-02 13:33   ` Danilo Krummrich
2025-06-02 15:15     ` Joel Fernandes
2025-06-03  8:12       ` Alexandre Courbot
2025-06-03 13:47         ` Joel Fernandes
2025-06-03 13:49           ` Danilo Krummrich
2025-06-03 14:29     ` Joel Fernandes
2025-06-04 18:23     ` Joel Fernandes
2025-06-03 21:05   ` Lyude Paul
2025-06-04 10:03     ` Miguel Ojeda
2025-06-05 16:09     ` Joel Fernandes
2025-06-05 16:21       ` Danilo Krummrich
2025-06-05 16:28         ` Joel Fernandes
2025-05-21  6:45 ` [PATCH v4 17/20] gpu: nova-core: compute layout of the FRTS region Alexandre Courbot
2025-06-03 21:14   ` Lyude Paul
2025-06-04  4:18     ` Alexandre Courbot [this message]
2025-06-04 10:24       ` Danilo Krummrich
2025-06-05 13:14         ` Alexandre Courbot
2025-06-04 10:23   ` Danilo Krummrich
2025-06-05 13:36     ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 18/20] gpu: nova-core: add types for patching firmware binaries Alexandre Courbot
2025-06-03 21:16   ` Lyude Paul
2025-06-04 10:28   ` Danilo Krummrich
2025-06-12  7:19     ` Alexandre Courbot
2025-06-12 10:54       ` Danilo Krummrich
2025-06-12 12:52         ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 19/20] gpu: nova-core: extract FWSEC from BIOS and patch it to run FWSEC-FRTS Alexandre Courbot
2025-06-03 21:32   ` Lyude Paul
2025-06-04  1:11     ` Alexandre Courbot
2025-06-04 10:42   ` Danilo Krummrich
2025-06-12  7:20     ` Alexandre Courbot
2025-05-21  6:45 ` [PATCH v4 20/20] gpu: nova-core: load and " Alexandre Courbot
2025-05-29 21:30   ` Timur Tabi
2025-05-30 22:32     ` Lyude Paul
2025-06-04  1:37     ` Alexandre Courbot
2025-06-03 21:45   ` Lyude Paul
2025-06-04  1:38     ` Alexandre Courbot

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