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Tue, 12 Aug 2025 06:22:52 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 12 Aug 2025 15:22:51 +0200 Message-Id: Cc: , , , , , , , , , , , To: From: =?utf-8?q?Radim_Kr=C4=8Dm=C3=A1=C5=99?= Subject: Re: [PATCH] RISC-V: KVM: Using user-mode pte within kvm_riscv_gstage_ioremap References: <20250809032020.51380-1-fangyu.yu@linux.alibaba.com> In-Reply-To: <20250809032020.51380-1-fangyu.yu@linux.alibaba.com> 2025-08-09T11:20:20+08:00, : >>> From: Fangyu Yu >>> According to the RISC-V Privileged Architecture Spec, for G-stage addre= ss >>> translation, all memory accesses are considered to be user-level access= es >>> as though executed in Umode. >> >>What implementation are you using? I would have assume that the >>original code was tested on QEMU, so we might have a bug there. >> > > This issue can be reproduced using QEMU. > Since kvm has registered the MMIO Bus for IMSIC gpa, when a guest > page fault occurs, it will call the imsic_mmio_write function,the > guest irq will be written to the guest interrupt file by kvm. Oh, so the interrupts were "just" slower. Great job catching that! >>> --- >>> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c >>> @@ -359,8 +360,11 @@ int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_= t gpa, >>> + pte =3D pte_mkdirty(pte); >> >>Is it necessary to dirty the pte? >> >>It was dirtied before, so it definitely doesn't hurt, > > Make pte dirty is necessary(for hardware without Svadu), and here is > the first time to make this pte dirty. Right, we would get a pointless trap otherwise, Thanks.