From: "Danilo Krummrich" <dakr@kernel.org>
To: "Alexandre Courbot" <acourbot@nvidia.com>
Cc: "David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
<nouveau@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>,
<rust-for-linux@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] gpu: nova-core: falcon: align DMA transfers to 256 bytes
Date: Thu, 21 Aug 2025 15:26:02 +0200 [thread overview]
Message-ID: <DC851M0PQQT4.298DSVDC1RKB0@kernel.org> (raw)
In-Reply-To: <20250821-falcondma_256b-v2-1-83e8647a24b5@nvidia.com>
On Thu Aug 21, 2025 at 6:49 AM CEST, Alexandre Courbot wrote:
> Falcon DMA transfers are done in 256 bytes increments, and the method
> responsible for initiating the transfer checked that the required length
> was indeed a multiple of 256. While correct, this also requires callers
> to specifically account for this limitation of DMA transfers, and we had
> for instance the fwsec code performing a seemingly arbitrary (and
> potentially overflowing) upwards alignment of the DMEM load size to
> match this requirement.
>
> Let's move that alignment into the loading code itself instead: since it
> is working in terms of number of transfers, we can turn this upwards
> alignment into a non-overflowing operation, and check that the requested
> transfer remains into the limits of the DMA object. This also allows us
> to remove a DMA-specific constant in the fwsec code.
>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Applied to nova-next, thanks!
prev parent reply other threads:[~2025-08-21 13:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-21 4:49 Alexandre Courbot
2025-08-21 13:26 ` Danilo Krummrich [this message]
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