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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b503c779df2sm522692566b.34.2025.10.09.02.16.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 09 Oct 2025 02:16:19 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Thu, 09 Oct 2025 11:16:18 +0200 Message-Id: From: "Luca Weiss" To: "Konrad Dybcio" , "Luca Weiss" , "Bjorn Andersson" , "Konrad Dybcio" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Marijn Suijten" Cc: <~postmarketos/upstreaming@lists.sr.ht>, , , , Subject: Re: [PATCH 2/5] arm64: dts: qcom: qcm6490-fairphone-fp5: Add VTOF_LDO_2P8 regulator X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20250930-sc7280-dts-misc-v1-0-5a45923ef705@fairphone.com> <20250930-sc7280-dts-misc-v1-2-5a45923ef705@fairphone.com> In-Reply-To: Hi Konrad, On Wed Oct 1, 2025 at 10:30 AM CEST, Konrad Dybcio wrote: > On 9/30/25 3:57 PM, Luca Weiss wrote: >> Describe yet another regulator-fixed on this board, powering the ToF >> sensor. >>=20 >> Signed-off-by: Luca Weiss >> --- >> arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 13 +++++++++++++ >> 1 file changed, 13 insertions(+) >>=20 >> diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/a= rm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts >> index 36d5750584831d66b4c2faf6042e4cbb3274eca7..0a64e5721e092d1f3e4bb732= 9335704eee567761 100644 >> --- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts >> +++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts >> @@ -195,6 +195,19 @@ vreg_usb_redrive_1v8: regulator-usb-redrive-1v8 { >> pinctrl-names =3D "default"; >> }; >> =20 >> + vreg_vtof_ldo_2p8: regulator-vtof-ldo-2p8 { >> + compatible =3D "regulator-fixed"; >> + regulator-name =3D "VTOF_LDO_2P8"; >> + regulator-min-microvolt =3D <2800000>; >> + regulator-max-microvolt =3D <2800000>; >> + regulator-enable-ramp-delay =3D <233>; >> + >> + gpio =3D <&tlmm 141 GPIO_ACTIVE_HIGH>; > > You may want to define the pincfg/mux config for this gpio too While I wouldn't say it's not good to have it, there's plenty of GPIOs that have no pinctrl for it. Downstream doesn't set anything for gpio141 either. I honestly wouldn't even know what the 'default' for a GPIO is in the first place, or could I query the runtime state from the kernel? Is /sys/kernel/debug/pinctrl/f100000.pinctrl/pinconf-groups trustworthy to solidify this in the dts? 141 (gpio141): input bias disabled, output drive strength (2 mA), output en= abled, pin output (0 level) Regards Luca > > Konrad