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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8f6ec35688sm234531566b.51.2026.02.13.00.02.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Feb 2026 00:02:24 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 13 Feb 2026 09:02:23 +0100 Message-Id: Cc: <~postmarketos/upstreaming@lists.sr.ht>, , , , , Subject: Re: [PATCH v2 0/3] Add CAMSS support for SM6350 From: "Luca Weiss" To: "Konrad Dybcio" , "Bryan O'Donoghue" , "Luca Weiss" , "Bryan O'Donoghue" , "Robert Foss" , "Todor Tomov" , "Vladimir Zapolskiy" , "Mauro Carvalho Chehab" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Bjorn Andersson" , "Konrad Dybcio" , "Taniya Das" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <3ph8XeidoxkUIsK7qiOH29pde94sdwa3ReWKVVrPabgS5enIAmwVAC5plyFnBMJGKQBnxFB6df6j69OMFIeavw==@protonmail.internalid> <20251114-sm6350-camss-v2-0-d1ff67da33b6@fairphone.com> <17e7ebc9-3b88-4334-b87d-1bce6d5bb120@linaro.org> <893b97ad-7d2b-4408-bab5-2cd63fdaa33b@oss.qualcomm.com> <28f33d3a-6866-4bdb-a1e5-d193dcb7d4d1@linaro.org> <0a114896-ffca-427a-8761-977dafa73ea5@linaro.org> <0392b41d-3a95-4c77-9267-bfa3e207013a@oss.qualcomm.com> In-Reply-To: <0392b41d-3a95-4c77-9267-bfa3e207013a@oss.qualcomm.com> On Tue Nov 18, 2025 at 12:50 PM CET, Konrad Dybcio wrote: > On 11/18/25 12:08 PM, Bryan O'Donoghue wrote: >> On 18/11/2025 10:06, Konrad Dybcio wrote: >>>>> Konrad >>>> vfe170 is what we have on sdm845 >>>> >>>> So I'm just asking Luca to try the sdm845 method of waggling this cloc= k since what we have doesn't work. >>> It's of course going to work because this way you're not calling the >>> code that throws this error >>> >>> I was curious whether you know the actual reason why this is being >>> done in some other GCC drivers >>> >>> Konrad >>=20 >> No notion at all, perhaps as a workaround to this very problem. > > I tried digging it up, but only managed to find that there is a signal > between titan and gcc to request it being enabled (perhaps that's a > fancy description of hwcg) > > Maybe +Taniya would know? (context: sm6350 gcc_camera_axi_clk stuck at > 'on' when disabling) Coming back on this again, anybody got an idea about this clock issue? Regards Luca > > Konrad