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Tue, 24 Mar 2026 16:43:28 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 3668339084073543840 EX-QQ-RecipientCnt: 13 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 24 Mar 2026 16:43:28 +0800 Message-Id: Cc: "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Paul Walmsley" , "Palmer Dabbelt" , "Albert Ou" , "Alexandre Ghiti" , , , , Subject: Re: [PATCH] riscv: dts: spacemit: Add PDMA controller node for K3 SoC From: "Troy Mitchell" To: "Yixun Lan" , "Troy Mitchell" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260317-k3-pdma-v1-1-f39d3e97b53a@linux.spacemit.com> <20260320091936-GKB525649@kernel.org> In-Reply-To: <20260320091936-GKB525649@kernel.org> X-QQ-SENDSIZE: 520 Feedback-ID: esmtpgz:linux.spacemit.com:qybglogicsvrgz:qybglogicsvrgz3a-0 X-QQ-XMAILINFO: Np+AlqyfvJHVpc7hVvY43qwyJpdWHfvirnCACHbn/nW0jNjvw0EEpFPZ x/Oe9asEpkd3nE62FhG8StuUYyTbbv67UV0E92swEoYNY1FkWKyr6srPYMNfjM/jVplo4f4 vSV7SeX6Xckmb+GYiGHsk/HRJIhHv4iRSZuygdKN2AwMLTKbiW5L2bf7N1PHEFbcbCfhHTl E65cDL42OiwC6iuLgIcl6a1FS0QWOQYcJOrse6Na7NnXyVVhXmcvTIE/DQ7sF78lWl3etmN v5DR3n4ZSYqk9vK5/3st+m23ib/mKzk2e2qdXAJVaXemnYcekZJWvgj5uE4M8DRf447A27K +/8vs/gzLgYZexeFzqkN3c+xzksiYYaIKhfJNCi49MCjuK6u0mR5TTBznMmKaNbtbMNDy4X 6w13x2KHte79FO9SPIHsHwC8C0iHLdLFO/YDzfIK60W0wsM0f8oUz1u4Eab4GUf7rTvxad7 /8X53ZJ0CWzOabQwBExc4Dr3kit+lOL5GYFTeGFFrfMavNQiXjTOQKdgieCywV7uScu/j5Y VyFRvuf7/W4oJUa0AA1Y5zr1cXTclalp0TZL4h3HRBPT1BaCqtmB2XSzcAPiI+DVoqLLVBi as/5dT9jWxvxPH4RRYuA0EvrxHfz40ZzN9D2y/oPxkAEQk+sQ30HJgtafk0PHWFVHzBsm+o LGlGq53euobI/2MvRcYeAIh+I9ABzdUw4oa0MEF5Itofpz239BSZpkd2kvZ03sC8rV+vCK4 CppKb9i/w7lCW+mLnXhHk64D16yUZGLtdSthCAiOQZiv+2qUUnqweqcU092zf+9uN9Jyvb2 /xRophKYnEoWUraEn+EEglV1pNOxDpt7I5RKVIVomc8JfVTJj/tvitrd94ROhOOwxVQ78dd NxNk3RE4vHW82xPOR2v5LOgcqX4vUow/peTmzJ5+BuIOBj2516t4AO+8VYdlx2glcH6olCf FXzD39CSb/Il9Dk79PoGDPdyk+2tZYMdSZ7d1OOuO9dKDW5GyD/0ZrCEvRkQVXCB0/0FEPp /2LOAoVAW1zx1R9XnhA14hini+Z6umoho4sjmPV9cSBqP1RlQj X-QQ-XMRINFO: NI4Ajvh11aEjEMj13RCX7UuhPEoou2bs1g== X-QQ-RECHKSPAM: 0 On Fri Mar 20, 2026 at 5:19 PM CST, Yixun Lan wrote: > Hi Troy, > > On 15:55 Tue 17 Mar , Troy Mitchell wrote: >> Add the Peripheral DMA (PDMA) controller node for the SpacemiT K3 SoC. >> The PDMA controller provides general-purpose DMA capabilities for variou= s >> peripheral devices across the system to offload CPU data transfers. >>=20 >> Unlike the previous K1 SoC, where some DMA masters had memory addressing >> limitations (e.g. restricted to the 0-4GB space) requiring a dedicated d= ma-bus >> with dma-ranges to restrict memory allocations, the K3 DMA masters have >> full memory addressing capabilities. Therefore, the PDMA node is now >> instantiated directly under the main soc bus. >>=20 > .. >> This configuration defines the essential hardware properties: >> - Register base address and size >> - High-level triggered interrupt >> - Associated APMU clock and reset controls >> - 16 hardware DMA channels >>=20 >> The node is disabled by default and should be enabled by specific >> board device trees as needed. > I would suggest to drop above, as they are quite obvious, and easy for=20 > people to grab from the code.. I'll remove them in the next version. >>=20 >> Signed-off-by: Troy Mitchell >> --- >> arch/riscv/boot/dts/spacemit/k3.dtsi | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >>=20 >> diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/= spacemit/k3.dtsi >> index a3a8ceddabec..f90d34a81be0 100644 >> --- a/arch/riscv/boot/dts/spacemit/k3.dtsi >> +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi >> @@ -438,6 +438,17 @@ soc: soc { >> dma-noncoherent; >> ranges; >> =20 >> + pdma: dma-controller@d4000000 { >> + compatible =3D "spacemit,k1-pdma"; > I think here we should introduce a new compatible for K3 SoC, > it would avoid ABI breakage if something different with K1? > cases exist even same PDMA IP integrated into different SoC.. > > The commit message tells some difference, although no code changes > introduced so far.. Nice point. - Troy > >> + reg =3D <0x0 0xd4000000 0x0 0x4000>; >> + clocks =3D <&syscon_apmu CLK_APMU_DMA>; >> + resets =3D <&syscon_apmu RESET_APMU_DMA>; >> + interrupts =3D <72 IRQ_TYPE_LEVEL_HIGH>; >> + dma-channels =3D <16>; >> + #dma-cells =3D <1>; >> + status =3D "disabled"; >> + }; >> + >> syscon_apbc: system-controller@d4015000 { >> compatible =3D "spacemit,k3-syscon-apbc"; >> reg =3D <0x0 0xd4015000 0x0 0x1000>; >>=20 >> --- >> base-commit: 95c541ddfb0815a0ea8477af778bb13bb075079a >> change-id: 20260317-k3-pdma-7c1734431436 >>=20 >> Best regards, >> --=20 >> Troy Mitchell >>=20