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From: "Eliot Courtney" <ecourtney@nvidia.com>
To: "John Hubbard" <jhubbard@nvidia.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Alexandre Courbot" <acourbot@nvidia.com>
Cc: "Timur Tabi" <ttabi@nvidia.com>,
	"Alistair Popple" <apopple@nvidia.com>,
	"Eliot Courtney" <ecourtney@nvidia.com>,
	"Shashank Sharma" <shashanks@nvidia.com>,
	"Zhi Wang" <zhiw@nvidia.com>, "David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	nova-gpu@lists.linux.dev, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v12 16/22] gpu: nova-core: add MCTP/NVDM protocol types for firmware communication
Date: Tue, 02 Jun 2026 21:53:57 +0900	[thread overview]
Message-ID: <DIYKUB4XQKK1.1JSE9PIRG42D7@nvidia.com> (raw)
In-Reply-To: <20260602032111.224790-17-jhubbard@nvidia.com>

On Tue Jun 2, 2026 at 12:21 PM JST, John Hubbard wrote:
> Add the MCTP (Management Component Transport Protocol) and NVDM (NVIDIA
> Device Management) wire-format types used for communication between the

I think NVDM here is "data model" not "device management" (and below).

> kernel driver and GPU firmware processors.
>
> This includes typed MCTP transport headers, NVDM message headers, and
> NVDM message type identifiers. Both the FSP boot path and the upcoming
> GSP RPC message queue share this protocol layer.
>
> Signed-off-by: John Hubbard <jhubbard@nvidia.com>
> ---
>  drivers/gpu/nova-core/mctp.rs      | 102 +++++++++++++++++++++++++++++
>  drivers/gpu/nova-core/nova_core.rs |   1 +
>  2 files changed, 103 insertions(+)
>  create mode 100644 drivers/gpu/nova-core/mctp.rs
>
> diff --git a/drivers/gpu/nova-core/mctp.rs b/drivers/gpu/nova-core/mctp.rs
> new file mode 100644
> index 000000000000..a13146dc0cca
> --- /dev/null
> +++ b/drivers/gpu/nova-core/mctp.rs
> @@ -0,0 +1,102 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
> +
> +//! MCTP/NVDM protocol types for NVIDIA GPU firmware communication.
> +//!
> +//! MCTP (Management Component Transport Protocol) carries NVDM (NVIDIA
> +//! Device Management) messages between the kernel driver and GPU firmware
> +//! processors such as FSP and GSP.
> +
> +#![expect(dead_code)]
> +
> +use kernel::pci::Vendor;
> +
> +/// NVDM message type identifiers carried over MCTP.
> +#[derive(Debug, Clone, Copy, Default, PartialEq, Eq)]
> +#[repr(u8)]
> +pub(crate) enum NvdmType {
> +    #[default]
> +    /// Chain of Trust boot message.
> +    Cot = 0x14,
> +    /// FSP command response.
> +    FspResponse = 0x15,
> +}
> +
> +impl TryFrom<u8> for NvdmType {
> +    type Error = u8;
> +
> +    fn try_from(value: u8) -> Result<Self, Self::Error> {
> +        match value {
> +            x if x == u8::from(Self::Cot) => Ok(Self::Cot),
> +            x if x == u8::from(Self::FspResponse) => Ok(Self::FspResponse),
> +            _ => Err(value),
> +        }
> +    }
> +}
> +
> +impl From<NvdmType> for u8 {
> +    fn from(value: NvdmType) -> Self {
> +        value as u8
> +    }
> +}
> +
> +bitfield! {
> +    pub(crate) struct MctpHeader(u32), "MCTP transport header for NVIDIA firmware messages." {
> +        31:31 som as bool, "Start-of-message bit.";
> +        30:30 eom as bool, "End-of-message bit.";
> +        29:28 seq as u8, "Packet sequence number.";
> +        23:16 seid as u8, "Source endpoint ID.";
> +    }
> +}
> +
> +impl MctpHeader {
> +    /// Builds a single-packet MCTP header (`SOM=1`, `EOM=1`, `SEQ=0`, `SEID=0`).
> +    pub(crate) fn single_packet() -> Self {
> +        Self::default().set_som(true).set_eom(true)
> +    }
> +
> +    /// Returns whether this is a complete single-packet message (`SOM=1` and `EOM=1`).
> +    pub(crate) fn is_single_packet(self) -> bool {
> +        self.som() && self.eom()
> +    }
> +}
> +
> +impl From<u32> for MctpHeader {
> +    fn from(raw: u32) -> Self {
> +        Self(raw)
> +    }
> +}

This `From` implementation looks unused in this series and the new bitfield
impl generates this IIUC, so I think we can remove this.

> +
> +/// MCTP message type for PCI vendor-defined messages.
> +const MSG_TYPE_VENDOR_PCI: u8 = 0x7e;
> +
> +bitfield! {
> +    pub(crate) struct NvdmHeader(u32), "NVIDIA Vendor-Defined Message header over MCTP." {
> +        31:24 nvdm_type as u8 ?=> NvdmType, "NVDM message type.";
> +        23:8 vendor_id as u16, "PCI vendor ID.";
> +        6:0 msg_type as u8, "MCTP vendor-defined message type.";
> +    }
> +}
> +
> +impl NvdmHeader {
> +    /// Builds an NVDM header for the given message type.
> +    pub(crate) fn new(nvdm_type: NvdmType) -> Self {
> +        Self::default()
> +            .set_msg_type(MSG_TYPE_VENDOR_PCI)
> +            .set_vendor_id(Vendor::NVIDIA.as_raw())
> +            .set_nvdm_type(nvdm_type)
> +    }
> +
> +    /// Validates this header against the expected NVIDIA NVDM format and type.
> +    pub(crate) fn validate(self, expected_type: NvdmType) -> bool {
> +        self.msg_type() == MSG_TYPE_VENDOR_PCI
> +            && self.vendor_id() == Vendor::NVIDIA.as_raw()
> +            && matches!(self.nvdm_type(), Ok(nvdm_type) if nvdm_type == expected_type)
> +    }
> +}
> +
> +impl From<u32> for NvdmHeader {
> +    fn from(raw: u32) -> Self {
> +        Self(raw)
> +    }
> +}

This `From` implementation looks unused.

With above comments resolved,

Reviewed-by: Eliot Courtney <ecourtney@nvidia.com>

  parent reply	other threads:[~2026-06-02 12:54 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-02  3:20 [PATCH v12 00/22] gpu: nova-core: firmware: Hopper/Blackwell support John Hubbard
2026-06-02  3:20 ` [PATCH v12 01/22] gpu: nova-core: set DMA mask width based on GPU architecture John Hubbard
2026-06-02  6:40   ` Eliot Courtney
2026-06-02  3:20 ` [PATCH v12 02/22] gpu: nova-core: Hopper/Blackwell: new location for PCI config mirror John Hubbard
2026-06-02  3:20 ` [PATCH v12 03/22] gpu: nova-core: Blackwell: compute PMU-reserved framebuffer size John Hubbard
2026-06-02  3:20 ` [PATCH v12 04/22] gpu: nova-core: Hopper/Blackwell: larger non-WPR heap John Hubbard
2026-06-02  3:20 ` [PATCH v12 05/22] gpu: nova-core: Hopper/Blackwell: larger WPR2 (GSP) heap John Hubbard
2026-06-02  3:20 ` [PATCH v12 06/22] gpu: nova-core: Blackwell: use correct sysmem flush registers John Hubbard
2026-06-02  3:30   ` sashiko-bot
2026-06-02  8:00     ` Alexandre Courbot
2026-06-02  7:12   ` Eliot Courtney
2026-06-02  8:26     ` Alexandre Courbot
2026-06-02  3:20 ` [PATCH v12 07/22] gpu: nova-core: don't assume 64-bit firmware images John Hubbard
2026-06-02  3:20 ` [PATCH v12 08/22] gpu: nova-core: add support for 32-bit " John Hubbard
2026-06-02  3:20 ` [PATCH v12 09/22] gpu: nova-core: add auto-detection of 32-bit, 64-bit " John Hubbard
2026-06-02  3:20 ` [PATCH v12 10/22] gpu: nova-core: Hopper/Blackwell: add FSP falcon engine stub John Hubbard
2026-06-02  6:50   ` Eliot Courtney
2026-06-02  3:20 ` [PATCH v12 11/22] gpu: nova-core: Hopper/Blackwell: add FMC firmware image John Hubbard
2026-06-02  7:18   ` Eliot Courtney
2026-06-02  3:21 ` [PATCH v12 12/22] gpu: nova-core: Hopper/Blackwell: add FSP secure boot completion waiting John Hubbard
2026-06-02  7:56   ` Eliot Courtney
2026-06-02  8:22     ` Alexandre Courbot
2026-06-02  3:21 ` [PATCH v12 13/22] gpu: nova-core: Hopper/Blackwell: add FMC signature extraction John Hubbard
2026-06-02  3:32   ` sashiko-bot
2026-06-02  7:56     ` Alexandre Courbot
2026-06-02  8:11   ` Eliot Courtney
2026-06-02  8:28     ` Alexandre Courbot
2026-06-03  0:04   ` Timur Tabi
2026-06-03  0:20     ` Alexandre Courbot
2026-06-03  3:09       ` Timur Tabi
2026-06-03  3:53         ` John Hubbard
2026-06-03 16:52           ` Timur Tabi
2026-06-02  3:21 ` [PATCH v12 14/22] gpu: nova-core: Hopper/Blackwell: add FSP falcon EMEM operations John Hubbard
2026-06-02 11:42   ` Eliot Courtney
2026-06-02 14:55     ` Alexandre Courbot
2026-06-02 15:02   ` Alexandre Courbot
2026-06-02  3:21 ` [PATCH v12 15/22] gpu: nova-core: Hopper/Blackwell: add FSP message infrastructure John Hubbard
2026-06-02  3:33   ` sashiko-bot
2026-06-03  1:14     ` Alexandre Courbot
2026-06-03  1:41       ` Eliot Courtney
2026-06-02 12:21   ` Eliot Courtney
2026-06-03  1:34     ` Alexandre Courbot
2026-06-03  4:49       ` Eliot Courtney
2026-06-03  5:00         ` Alexandre Courbot
2026-06-03  1:00   ` Alexandre Courbot
2026-06-02  3:21 ` [PATCH v12 16/22] gpu: nova-core: add MCTP/NVDM protocol types for firmware communication John Hubbard
2026-06-02  5:36   ` sashiko-bot
2026-06-03  2:41     ` Alexandre Courbot
2026-06-02 12:53   ` Eliot Courtney [this message]
2026-06-02  3:21 ` [PATCH v12 17/22] gpu: nova-core: Hopper/Blackwell: add FSP send/receive messaging John Hubbard
2026-06-02  3:35   ` sashiko-bot
2026-06-02  3:21 ` [PATCH v12 18/22] gpu: nova-core: Hopper/Blackwell: select FSP Chain of Trust version John Hubbard
2026-06-02 12:55   ` Eliot Courtney
2026-06-02  3:21 ` [PATCH v12 19/22] gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust boot John Hubbard
2026-06-02  3:40   ` sashiko-bot
2026-06-03  5:23     ` Alexandre Courbot
2026-06-03  5:19   ` Alexandre Courbot
2026-06-02  3:21 ` [PATCH v12 20/22] gpu: nova-core: Hopper/Blackwell: add GSP lockdown release polling John Hubbard
2026-06-02  3:38   ` sashiko-bot
2026-06-03  5:45   ` Alexandre Courbot
2026-06-02  3:21 ` [PATCH v12 21/22] gpu: nova-core: add non-sec2 unload path John Hubbard
2026-06-02  3:21 ` [PATCH v12 22/22] gpu: nova-core: gsp: enable FSP boot path John Hubbard
2026-06-02  3:38   ` sashiko-bot
2026-06-02 12:38 ` [PATCH v12 00/22] gpu: nova-core: firmware: Hopper/Blackwell support Danilo Krummrich
2026-06-02 13:37 ` Alexandre Courbot

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