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Hopper and Blackwell boot the GSP via FSP, while > Ada, whose chip IDs fall numerically between Hopper and Blackwell, uses > the older SEC2 booter path instead. Add a comment so the table ordering > does not suggest that everything past Hopper uses FSP. > > Suggested-by: Timur Tabi > Signed-off-by: John Hubbard > --- > > Changes since v1 [1]: > > * Keep the existing "Hopper and later" wording in uses_fsp() rather than > changing it, and put the clarification entirely in the chipset table > comment (Timur Tabi). > > * Reword that comment to describe the Hopper/Ada chip-ID inversion and to > say "Hopper and later" excludes Ada and means Hopper, Blackwell, Rubin, > and everything after that, so it stays correct once Rubin is added > (Timur Tabi). > > [1] https://lore.kernel.org/all/20260610234128.547952-1-jhubbard@nvidia.c= om/ > > > drivers/gpu/nova-core/gpu.rs | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs > index b3c91731db45..20b59bb6b7d9 100644 > --- a/drivers/gpu/nova-core/gpu.rs > +++ b/drivers/gpu/nova-core/gpu.rs > @@ -91,6 +91,10 @@ fn try_from(value: u32) -> Result { > GA104 =3D 0x174, > GA106 =3D 0x176, > GA107 =3D 0x177, > + // Chip IDs are in numerical order, which does not match FSP capabil= ity. Hopper (GH100) has a > + // lower chip ID than Ada (AD10x), yet Hopper boots the GSP via FSP = while Ada uses the older > + // SEC2 booter. We therefore consider Hopper to be after Ada, so "Ho= pper and later" excludes > + // Ada and means Hopper, Blackwell, Rubin, and everything after that= . This would be inconsistent with the derived `PartialOrd` implementation? If we consider Hopper to be after Ada, then we should be able to `assert!(G= H100 > AD102);` Best, Gary > // Hopper > GH100 =3D 0x180, > // Ada > > base-commit: 550dc7536644db2d67c6f8cf525bba682fba08d9