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> =20 > - self.cmdq > - .send_command_no_wait(bar, commands::SetSystemInfo::new(pdev= , chipset))?; > + self.cmdq.send_command_no_wait( > + bar, > + commands::SetSystemInfo::new(pdev, chipset, ctx.vgpu.state()= ), > + )?; > self.cmdq > .send_command_no_wait(bar, commands::SetRegistry::new(ctx.vg= pu.state())?)?; > =20 > diff --git a/drivers/gpu/nova-core/gsp/commands.rs b/drivers/gpu/nova-cor= e/gsp/commands.rs > index ffc25fd8c47b..11d0c7ec371e 100644 > --- a/drivers/gpu/nova-core/gsp/commands.rs > +++ b/drivers/gpu/nova-core/gsp/commands.rs > @@ -41,12 +41,21 @@ > pub(crate) struct SetSystemInfo<'a> { > pdev: &'a pci::Device, > chipset: Chipset, > + vgpu_state: VgpuState, > } > =20 > impl<'a> SetSystemInfo<'a> { > /// Creates a new `GspSetSystemInfo` command using the parameters of= `pdev`. > - pub(crate) fn new(pdev: &'a pci::Device, chipset: Chi= pset) -> Self { > - Self { pdev, chipset } > + pub(crate) fn new( > + pdev: &'a pci::Device, > + chipset: Chipset, > + vgpu_state: VgpuState, > + ) -> Self { > + Self { > + pdev, > + chipset, > + vgpu_state, > + } > } > } > =20 > @@ -57,7 +66,7 @@ impl<'a> CommandToGsp for SetSystemInfo<'a> { > type InitError =3D Error; > =20 > fn init(&self) -> impl Init { > - Self::Command::init(self.pdev, self.chipset) > + Self::Command::init(self.pdev, self.chipset, self.vgpu_state) > } > } > =20 > diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/= fw.rs > index 6e8e7d822ef1..6afe08abd868 100644 > --- a/drivers/gpu/nova-core/gsp/fw.rs > +++ b/drivers/gpu/nova-core/gsp/fw.rs > @@ -254,6 +254,7 @@ pub(crate) enum MsgFunction { > GspLockdownNotice =3D bindings::NV_VGPU_MSG_EVENT_GSP_LOCKDOWN_NOTIC= E, > GspPostNoCat =3D bindings::NV_VGPU_MSG_EVENT_GSP_POST_NOCAT_RECORD, > GspRunCpuSequencer =3D bindings::NV_VGPU_MSG_EVENT_GSP_RUN_CPU_SEQUE= NCER, > + GpuacctPerfmonUtilSamples =3D bindings::NV_VGPU_MSG_EVENT_GPUACCT_PE= RFMON_UTIL_SAMPLES, > MmuFaultQueued =3D bindings::NV_VGPU_MSG_EVENT_MMU_FAULT_QUEUED, > OsErrorLog =3D bindings::NV_VGPU_MSG_EVENT_OS_ERROR_LOG, > PostEvent =3D bindings::NV_VGPU_MSG_EVENT_POST_EVENT, > @@ -303,6 +304,9 @@ fn try_from(value: u32) -> Result { > bindings::NV_VGPU_MSG_EVENT_GSP_RUN_CPU_SEQUENCER =3D> { > Ok(MsgFunction::GspRunCpuSequencer) > } > + bindings::NV_VGPU_MSG_EVENT_GPUACCT_PERFMON_UTIL_SAMPLES =3D= > { > + Ok(MsgFunction::GpuacctPerfmonUtilSamples) > + } > bindings::NV_VGPU_MSG_EVENT_MMU_FAULT_QUEUED =3D> Ok(MsgFunc= tion::MmuFaultQueued), > bindings::NV_VGPU_MSG_EVENT_OS_ERROR_LOG =3D> Ok(MsgFunction= ::OsErrorLog), > bindings::NV_VGPU_MSG_EVENT_POST_EVENT =3D> Ok(MsgFunction::= PostEvent), > diff --git a/drivers/gpu/nova-core/gsp/fw/commands.rs b/drivers/gpu/nova-= core/gsp/fw/commands.rs > index 6dc31d1bf5ae..edf21aa8c61b 100644 > --- a/drivers/gpu/nova-core/gsp/fw/commands.rs > +++ b/drivers/gpu/nova-core/gsp/fw/commands.rs > @@ -16,11 +16,42 @@ > use crate::{ > gpu::Chipset, > gsp::GSP_PAGE_SIZE, > - num::IntoSafeCast, // > + num::IntoSafeCast, > + vgpu::VgpuState, // > }; > =20 > use super::bindings; > =20 > +/// Builds the VF topology passed to GSP-RM as part of the system inform= ation. > +fn build_vf_info( > + dev: &pci::Device, > + vgpu_state: VgpuState, > +) -> Result { > + let VgpuState::Enabled { total_vfs } =3D vgpu_state else { > + return Ok(Default::default()); > + }; > + > + let sriov =3D dev > + .config_space_extended()? > + .find_ext_capability::()?; > + > + let bar0 =3D sriov.read_vf_bar(0)?; > + let bar1 =3D sriov.read_vf_bar(bar0.next_index())?; > + let bar2 =3D sriov.read_vf_bar(bar1.next_index())?; This basically confirms the discussion we had on the SR-IOV thread: the iterator pattern is the correct one here. The patch itself looks good, so I think we can merge it as soon as the dependency is in and Danilo's feedback is addressed.